QLX4600LIQSR Intersil, QLX4600LIQSR Datasheet - Page 13

• Manufacturer Part Number: QLX4600LIQSR
• Description: IC EQUALIZER REC 6.25GBPS 46QFN
• Manufacturer: Intersil

Specifications of QLX4600LIQSR

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 24. CML INPUT EQUIVALENT CIRCUIT FOR THE
FIGURE 25. CML OUTPUT EQUIVALENT CIRCUIT FOR
NOTE: The load value of 52Ω is used to internally match
SDD
Line Silence/Electrical Idle/Quiescent Mode
Line silence is commonly broken by the limiting
amplification in other equalizers. This disruption can be
detrimental in many systems that rely on line silence as
part of the protocol. The QLx4600-SL30 contains special
lane management capabilities to detect and preserve
periods of line silence while still providing the fidelity-
enhancing benefits of limiting amplification during active
data transmission. Line silence is detected by measuring
the amplitude of the equalized signal and comparing that
to a threshold set by the current at the DT pin. When the
amplitude falls below the threshold, the output driver
IN[k] N
IN[k] P
22
1. The output common mode voltage remains constant during both active data transmission and output muting modes.
52Ω
for a characteristic impedance of 50Ω.
QLx4600-S30
THE QLx4600-S30
52Ω
V
DD
V
50Ω
50Ω
DD
13
Buffer
OUT[k] P
OUT[k] N
QLx4600-SL30
FIGURE 26. PIN DIAGRAM HIGHLIGHTING PINS USED
stages are muted and held at their nominal common
mode voltage
LOS Indicator
Pins LOS[k] are used to output the state of the muting
circuitry to serve as a loss of signal indicator for channel
k. This signal is directly derived from the muting signal
off the DT-threshold signal detector output. The LOS
signal goes ‘HIGH’ when the power signal is below the DT
threshold and ‘LOW’ when the power goes above the DT
threshold. This feature is meant to be used in optical
systems (e.g. QSFP) where there are no quiescent or
electrical-idle states. In these cases, the DT threshold is
used to determine the sensitivity of the LOS indicator.
Applications Information
Several aspects of the QLx4600-SL30 are capable of
being dynamically managed by a system controller to
provide maximum flexibility and optimum performance.
These functions are controlled by interfacing to the
highlighted pins in Figure 26. The specific procedures for
controlling these aspects of the QLx4600-SL30 are the
focus of this section.
Equalization Boost Level
Channel equalization for the QLx4600-SL30 can be
individually set to either (a) one of 18 levels through the
DC voltages on external control pins or (b) one of 32
levels via a set of registers programmed by a low speed
serial bus. The pins used to control the boost level are
highlighted in Figure 26. Descriptions of these pins are
listed in Table 1. Please refer to “Pin Descriptions” on
page 3 for descriptions of all other pins on the
QLx4600-SL30.
FOR DYNAMIC CONTROL OF THE QLx4600-
SL30
IN1[P]
IN1[N]
IN2[P]
IN2[N]
IN3[P]
IN3[N]
IN4[P]
IN4[N]
LOS1
LOS2
GND
1
V
V
V
DT
.
DD
DD
DD
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
46
16
45
17
QLx4600-SL30
44
18
46-Lead QFN
Exposed Pad
7mm x 4mm
0.4mm Pitch
Quellan
43
19
(GND)
42
20
41
21
40
22
39
23
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
BGREF
OUT1[P]
OUT1[N]
V
OUT2[P]
OUT2[N]
V
OUT3[P]
OUT3[N]
V
OUT4[P]
OUT4[N]
LOS3
LOS4
MODE
DD
DD
DD
November 19, 2009
FN6981.1