DD-160128FC-2A DENSITRON, DD-160128FC-2A Datasheet - Page 16
![DISPLAY, OLED, RGB, 160X128](/photos/22/51/225189/149884107-40_sml.jpg)
DD-160128FC-2A
Manufacturer Part Number
DD-160128FC-2A
Description
DISPLAY, OLED, RGB, 160X128
Manufacturer
DENSITRON
Datasheet
1.DD-160128FC-1A.pdf
(45 pages)
Specifications of DD-160128FC-2A
Screen Size
42.926mm
Resolution
160 X 128
Viewing Area (h X W)
28.864mm X 35.575mm
Pixel Size (h X W)
0.045mm X 0.194mm
Voltage Rating
2.8V
External Depth
1.7mm
External Length / Height
34mm
Interface Type
Parallel, Serial
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SYNCOAM Co., Ltd. SEPS525 Version: 0.2
Reset Status
The SEPS525 is initialized as following description when RESETB terminal is set to “L”. Usually RESETB
terminal is connected reset terminal of MPU, so that the chip can be initialized simultaneously with MPU.
The SEPS525 should be initialized when the power is on.
INITIAL SETTING CONDITION (default setting)
7. RGB data swap : OFF
8. Row scan shift direction : G0, G1, … , G126, G127
9. Column data shift direction : S0, S1, … , S478, S479
10. Display ON/OFF : OFF
11. Panel display size : FX1 = 00h, FX2 = 9Fh, FY1 = 00h, FY2 = 7Fh
12. Display data RAM read column/row address : FAC = 00h, FAR = 00h
13. Precharge time(R/G/B) : 0 clock
14. Precharge current(R/G/B) : 0 uA
15. Driving current(R/G/B) : 0 uA
POWER ON SEQUENCE
1. Frame frequency : 90Hz
2. OSC : internal OSC
3. Internal OSC : ON
4. DDRAM write horizontal address : MX1 = 00h, MX2 = 9Fh
5. DDRAM write vertical address : MY1 = 00h, MY2 = 7Fh
6. Display data RAM write : HC = 1, VC = 1, HV = 0
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