HBCU-5710R Avago Technologies US Inc., HBCU-5710R Datasheet
HBCU-5710R
Specifications of HBCU-5710R
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HBCU-5710R Summary of contents
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... Small Form Pluggable Low Voltage (3.3 V) Electrical Transceiver over Category 5 Unshielded Twisted Pair Cable Data Sheet Description The HBCU-5710R electrical transceiver from Avago Tech- nologies offers full duplex throughput of 1000 Mb/s by transporting data over unshielded twisted pair category 5 cable with 5-level PAM (Pulse Amplitude Modulation) signals ...
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... The HBCU-5710R complies with an industry standard MultiSource Agreement that defines the serial identifica- tion protocol. This protocol uses the 2-wire serial CMOS EEPROM protocol of the ATMEL AT24C01A or equivalent. The contents of the HBCU-5710R serial ID memory are defined in Table 3 as specified in the SFP MSA. TX_DATA RX_DATA ...
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... Caution There are no user serviceable parts nor any maintenance required for the HBCU-5710R. Tampering with or modi- fying the performance of the HBCU-5710R will result in voided product warranty. It may also result in improper operation of the HBCU-5710R circuitry, and possible overstress of the RJ 45 connector. Device degradation or product failure may result ...
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Table 1: Regulatory Compliance Feature Test Method Electrostatic Discharge (ESD) MIL-STD-883C, Method 3015.4 to the Electrical Pins JEDEC/ EIA JESD22-A114-A Electrostatic Discharge (ESD) Variation of IEC 61000-4-2 to the RJ 45 Connector Receptacle Electromagnetic Interference (EMI) FCC Part 15 Class ...
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... K 4.7 K 4.7 K 4.7 K Figure 4: Typical Application Configuration V_SUPPLY 0 Note: Inductors must have less than 1 ohm series resistance per MSA. Figure 5: MSA Recommended Power Supply Filter 5 VCC_T HBCU-5710R VCC_R 4.7 K TX_DISABLE TX_FAULT PHY IC TD+ 100 0.01 uF TD- 0.01 uF RJ45 JACK & ...
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Table 2: 20-pin Connection Diagram Description Pin Name Function/Description Transmitter Ground Fault Transmitter Fault Indication - High Indicates a Fault 3 TX Disable Transmitter Disable - Module disables on high or open 4 MOD-DEF2 ...
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Absolute Maximum Ratings Parameter Storage Temperature Case Temperature Relative Humidity Module Supply Voltage Data/Control Input Voltage Sense Output Current - MOD-DEF 2 Recommended Operating Conditions Parameter Case Temperature Module Supply Voltage Data Rate Transceiver Electrical Characteristics ( °C ...
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Transmitter and Receiver Electrical Characteristics ( °C to +70 ° 3.3 V ± 5 Parameter Data Input: Transmitter Differential Input Voltage (TD +/-) Data Output: Receiver Differential Output Voltage (RD +/-) Receive ...
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V > 3. POWER SAVING (TX_DISABLE) TRANSMITTED SIGNAL (AUTO-NEGOTIATION BEGINS) t-init: MODULE HOT-PLUGGED OR VOLTAGE APPLIED AFTER INSERTION, WHEN TX_DISABLE IS NEGATED V > 3. TX_DISABLE TRANSMITTED SIGNAL (AUTO-NEGOTIATION BEGINS) t-init: VOLTAGE APPLIED WHEN TX_DISABLE IS ...
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Table 3: EEPROM Serial ID Memory Contents at address A0 Address Hex ASCII Address ...
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Internal ASIC Registers The ASIC (or “PHY”, for Physical Layer IC) in the transceiver module contains 32 registers. Each register contains 16 bits. The registers are summarized in Table 4 and detailed in Tables 5 through 22. Each bit is ...
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Table 5: Register 0 (Control) Bit Name Description 0.15 Reset 1 = PHY reset R Normal Operation 0.14 Loopback 1 = Enable R Disable 0.13 Speed Selection (LSB 1000 Mb/s R/W 0.12 Auto-Negotiation 1 ...
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Table 6: Register 1 (Status) Bit Name Description 1.15:9 N/A to SFP Module RO 1.8 Extended Status 1 = Extended status information in register 15 RO 1.7 N/A to SFP Module RO 1.6 MF Preamble 1 = PHY will accept ...
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Table 8: Register 5 (Auto-Negotiation Link Partner Ability) Bit Name Description 5.15 Next Page 1 = Link partner advertises next page ability Link partner does not advertise next page ability 5.14 Acknowledge 1 = Link partner acknowledges ...
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Table 10: Register 7 (Auto-Negotiation Next Page Transmit Register) Bit Name Description 7.15 Next Page 1 = Additional next pages to follow R Last page 7.14 N/A to SFP Module RO 7.13 Message Page 1 = Message page ...
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Table 12: Register 9 (MASTER-SLAVE Control) Bit Name Description 9.15:13 Transmitter Test 000 = Normal Operation R/W Mode 001 = Transmit Waveform Test 010 = Transmit Jitter Test in MASTER Mode 011 = Transmit Jitter Test in SLAVE Mode 9.12 ...
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Table 13: Register 10 (MASTER-SLAVE Status) Bit Name Description 10.15 MASTER-SLAVE Con MASTER-SLAVE configuration RO/LH/SC figuration Fault fault detected MASTER-SLAVE configuration fault detected 10.14 MASTER-SLAVE Con Local PHY configuration resolved RO figuration Resolution ...
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Table 15: Register 17 (Extended Status 1) Bit Name Description 17.15:14 Speed 10 = 1000 Mbps RO 17.13 Duplex 1 = Full duplex Half duplex 17.12 Page Received 1 = Page received RO/ Page not ...
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Table 16: Register 20 (Extended Control 2) Bit Name Description 20.15 Link down on no idles 1 = Link lock lost Link lock intact 20.14:4 N/A to SFP Module R/W 20.3 Clause Disable BASE-X ...
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Table 19: Register 26 (Extended Control 3) Bit Name Description 26.15:8 N/A to SFP Module RO 26.7:3 N/A to SFP Module R/W 26.2:0 RD+/- Output Ampli- 000 = 0.50 V R/W tude 001 = 0.55 V 010 = 0.60 V ...
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Table 21: Register 28 (Cable Diagnostic 2) Bit Name Description 28.15 Enable Cable 1 = Enable test R/W Diagnostic Test 0 = disable test 28.14:13 Status 11 = Test fail Open detected in twisted pair 01 = ...
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Figure 7a: Module Drawing (dimensions in millimeter) 22 66.04 - 71.12 13.40 ± 0.10 51.40 1.00 PCB 1.00 ± 0.10 2.25 ± 0.10 2.67 34.30 41.80 ± 0.15 8.50 ± ...
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CAGE ASSEMBLY BEZEL NOTE: DIMENSIONS IN MILLIMETERS Figure 7b. Assembly Drawing 13.80 MAX 1.70 ± 0.90 3.50 ± 0.30 5.94 ± 0.20 13.49 ± 0.30 2.58 ± 0.20 22.11 ± 0.30 SFP MSA RECOMMENDED BEZEL PC BOARD ...
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NOTE: DIMENSIONS IN MILLIMETERS Figure 7c. Angled Application 24 70~ 25.30 22.84 3.83 2.06 ...
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Figure 7d. SFP Host Board Mechanical Layout For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and ...