ADNS-5700-H3NB Avago Technologies US Inc., ADNS-5700-H3NB Datasheet - Page 31

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ADNS-5700-H3NB

Manufacturer Part Number
ADNS-5700-H3NB
Description
USB SoC 3B 270deg Optical Sensor
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ADNS-5700-H3NB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Set_Feature_Endpt0
Default:
Addressed:
Configured:
Notes:
Set_Feature_Endpt1
Default:
Addressed:
Configured:
Notes:
Clear_Feature_Device
Default:
Addressed:
Configured:
Notes:
Clear_Feature_Endpt0
Default:
Addressed:
Configured:
Notes:
Clear_Feature_Endpt1
Default:
Addressed:
Configured:
Notes:
31
02 03 00 00 xx 00 00 00
02 03 00 00 00 00 00 00
02 03 00 00 80 00 00 00
xx = 00 = Endpt0 OUT
xx = 80 = Endpt0 IN
Stall (undefined in USB Spec)
Stall
Stall
This (tries to) sets the halt bit. The chip always stalls the status stage for this command. The
chip never reports the halt bit set for Endpt0 with the Get_Status_Endpt0 command, as any
new SETUP command will clear Endpt0 stall.
02 03 00 00 81 00 00 00
Stall (undefined in USB Spec)
Stall
Accept
Sets the halt bit for Endpt1.
00 01 01 00 00 00 00 00
Accept (undefined in USB Spec)
Accept
Accept
This clears the remote wakeup bit.
02 01 00 00 xx 00 00 00
02 01 00 00 00 00 00 00
02 01 00 00 80 00 00 00
xx = 00 = Endpt0 OUT
xx = 80 = Endpt0 IN
Accept (undefined in USB Spec)
Accept
Accept
The chip does NOT stall like it does for Set_Feature_Endpt0.
02 01 00 00 81 00 00 00
Stall (undefined in USB Spec)
Stall
Accept
See Set_Feature_Endpt1.

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