HFBR-0559 Avago Technologies US Inc., HFBR-0559 Datasheet - Page 8
![Fiber Optics, Evaluation Kit](/photos/15/66/156698/5989-4630en_sml.jpg)
HFBR-0559
Manufacturer Part Number
HFBR-0559
Description
Fiber Optics, Evaluation Kit
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HFBR-0559.pdf
(16 pages)
Specifications of HFBR-0559
Silicon Manufacturer
Avago
Silicon Core Number
HFBR-5903/5903E/5903A
Kit Application Type
Communication & Networking
Application Sub Type
Ethernet Transceiver
Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
HFBR-5903, FDDL, Fast Ethernet Transceivers
Primary Attributes
FDDE & Fast Ethernet SFF Transceiver Compatible
Secondary Attributes
SONET OC-3/SDH STM-1
Description/function
Fiber Optic Kit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
HFCT-5903E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Figure 9. Recommended Board Layout Hole Pattern
Board Layout - Decoupling Circuit, Ground Planes and
Termination Circuits
It is important to take care in the layout of your circuit
board to achieve optimum performance from these
transceivers. Figure 7 provides a good example of a
schematic for a power supply decoupling circuit that
works well with these parts. It is further recommended
that a continuous ground plane be provided in the
circuit board directly under the transceiver to provide
a low inductance ground for signal return current. This
recommendation is in keeping with good high
frequency board layout practices. Figures 7 and 8 show
two recommended termination schemes.
8
DIMENSIONS IN MILLIMETERS (INCHES)
NOTES:
1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE MT-RJ
2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO
3. 10 PIN MODULE REQUIRES ONLY 16 PCB HOLES, INCLUDING 4 PACKAGE GROUNDING TAB
4. THE SOLDER POSTS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL
TRANSCEIVER PLACED AT .550 SPACING.
METAL TRACES OR GROUND CONNECTION IN KEEP-OUT AREAS.
INTEGRITY AND TO ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS.
(0.425)
(0.525)
HOLES CONNECTED TO SIGNAL GROUND.
13.34
10.8
KEEP OUT AREA
FOR PORT PLUG
(0.299)
(0.276)
7.59
(0.118)
7
3
(1.063)
27
(0.055±0.004)
Ø 1.4 ±0.1
(0.236)
(0.118)
6
3
(0.28 )
7.11
17.78
(0.7)
(0.18)
4.57
Ø 1.4 ±0.1
(0.055±0.004)
(0.07)
1.778
(0.121 )
3.08
7.112
(0.28)
Board Layout - Hole Pattern
The Avago Technologies transceiver complies with the
circuit board “Common Transceiver Footprint” hole
pattern defined in the original multisource announce-
ment which defined the 2 x 5 package style. This
drawing is reproduced in Figure 9 with the addition of
ANSI Y14.5M compliant dimensioning to be used as a
guide in the mechanical layout of your circuit board.
Regulatory Compliance
These transceiver products are intended to enable
commercial system designers to develop equipment
that complies with the various international regulations
governing certification of Information Technology
Equipment. See the Regulatory Compliance Table for
details. Additional information is available from your
Avago Technologies sales representative.
(0.121)
3.08
(0.14)
3.56
(0.378 )
Ø 2.29
10.16
9.59
(0.4) 13.97
(0.09)
(0.032±0.004)
Ø 0.81 ±0.1
(0.55)
MIN.
Holes For
Housing
Leads
(0.079 )
2
Ø 1.4 ±0.1
(0.055±0.004)