HW-V5-ML505-UNI-G Xilinx Inc, HW-V5-ML505-UNI-G Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
HW-V5-ML505-UNI-G
Manufacturer Part Number
HW-V5-ML505-UNI-G
Description
KIT, EVAL PLATFORM, VIRTEX-5 LXT, ML505
Manufacturer
Xilinx Inc
Datasheet
1.HW-V5-ML505-UNI-G.pdf
(31 pages)
Specifications of HW-V5-ML505-UNI-G
Kit Contents
RoHS Compliant
Svhc
No SVHC (15-Dec-2010)
Development Tool Type
Hardware / Software - Evaluation Kit
Silicon Manufacturer
Xilinx
Core Architecture
Virtex
Silicon Family Name
Virtex-5
Features
Linear Flash,
Rohs Compliant
Yes
Typographical Conventions
ML505/ML506/ML507 Getting Started Tutorial
UG348 (v3.0.3) June 18, 2009
Online Document
R
This document uses the following typographical conventions. An example illustrates each
convention.
The following conventions are used in this document:
Italic font
Underlined Text
Blue text
Red text
Blue, underlined text
Convention
Convention
References to other documents
Emphasis in text
Indicates a link to a web page.
Cross-reference link to a location
in the current document
Cross-reference link to a location
in another document
Hyperlink to a website (URL)
www.xilinx.com
Meaning or Use
Meaning or Use
See the Virtex-5 FPGA
Configuration Guide for more
information.
The address (F) is asserted after
clock event 2.
http://www.xilinx.com/virtex5
See the section
Documentation”
Refer to
Primitive”
See
Sheet
Go to
for the latest documentation.
Typographical Conventions
Figure 2
http://www.xilinx.com
“System Monitor
Example
for details.
Example
in the
“Additional
for details.
Virtex-5 Data
7