IPR-10GETHERNET Altera, IPR-10GETHERNET Datasheet - Page 31

• Manufacturer Part Number: IPR-10GETHERNET
• Description: IP CORE Renewal Of IP-10GETHERNET
• Manufacturer: Altera

Specifications of IPR-10GETHERNET

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Quartus II
• Features: IEEE 802.3 2005 And 802.1Q Ethernet Standards, Management Data I/O (MDIO) Master Interface
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

MAC Functional Description
© July 2010 Altera Corporation
contain an additional 8-byte field between the source address and length/type fields.
The Tx MAC forwards the VLAN or stacked VLAN tag and fields to the PHY as it
would for other payload octets. Recently, the IEEE 802.1ah standard for Provider
Backbone Bridge (PBB) and PBB traffic engineering (TE) or MAC-in-MAC is gaining
traction which still can use this VLAN stacking for inner and outer VLAN tags.
Figure 3–5. MAC Frame Showing VLAN Fields
3.2.1.5. Frame Padding
When the length of client frame is less than 64 bytes (meaning the payload is less than
46 bytes), the Tx MAC module inserts pad bytes (0x00) after the payload to create a
frame length equal to the minimum size of 64 bytes.
3.2.1.6. Frame Check Sequence (CRC-32) Insertion
The Tx MAC computes and inserts CRC32 checksum in the transmitted MAC frame.
The frame check sequence (FCS) field contains a 32-bit CRC value. The MAC
computes the CRC32 over the frame bytes that include the source address, destination
address, length, data, and pad. The CRC checksum computation excludes the
preamble, SFD, FCS, and extension. The encoding is defined by the following
generating polynomial:
CRC bits are transmitted with MSB (X
Avalon-ST Interface Lanes” on page 3–14
SIgnals” on page 3–14
3.2.1.7. Interpacket Gap Generation and Insertion
The Tx MAC maintains the minimum interpacket gap (IPG) between transmitted
frames required by the IEEE 802.3 Ethernet standard. The default minimum IPG
minimum is maintained at 96 bit times (or 12 byte times). However, you can change
the default IPG (in bytes) via the configuration register tx_ipg_length. You can
configure the minimum IPG to any value between 8 bytes and 252 bytes times in the
tx_ipg_length register.
FCS(X) = X
7 Octets
1 Octets
6 Octets
6 Octets
2 Octets
2 Octets
2 Octets
Octets
4 Octets
32
Length/Type = 802.1Q TagType
+X
MAC Client Length Type
Frame Check Sequence
Tag Control Information
Destination Address
26
MAC Client Data
Source Address
for illustrations of byte ordering.
Preamble
Extension
+X
SFD
Pad
23
+X
22
+X
16
32
+X
) first. (Refer to
and
12
Tag Control Information (informative)
+X
“Octet Transmission on the Avalon-ST
VLAN Identifier (VID, 12 bits)
priority
11
8 7 6 5 4 3 2 1
1 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
user
+X
10
10-Gbps Ethernet IP Functional Description
CFI
+X
“Byte Order on the
8
+X
7
+X
5
+X
first octet
second octet
first octet
second octet
4
+X
2
+X
1
3–5
+1