PN5120A0HN/C1,518 NXP Semiconductors, PN5120A0HN/C1,518 Datasheet - Page 34
PN5120A0HN/C1,518
Manufacturer Part Number
PN5120A0HN/C1,518
Description
IC TRANSMISSION MOD 40-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.PN5120A0HN1C2118.pdf
(125 pages)
Specifications of PN5120A0HN/C1,518
Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
9.2.2.3 TxModeReg
Defines the data rate and framing during transmission.
Table 50.
Table 51.
Bit
7
6 to 4
3
2
1 to 0
Access
Rights
Symbol
TxCRCEn
TxSpeed
InvMod
TxMix
TxFraming
TxCRCEn
TxModeReg register (address 12h); reset value: 00h, 00000000b
Description of TxModeReg bits
r/w
7
All information provided in this document is subject to legal disclaimers.
Rev. 3.6 — 10 March 2011
Description
Set to logic 1, this bit enables the CRC generation during data
transmission.
Note: This bit shall only be set to logic 0 at 106 kbit.
Defines the bit rate while data transmission.
Value
000
001
010
011
100
101
110
111
Note: The bit coding for transfer speeds above 424 kbit is equivalent to
the bit coding of Active Communication mode 424 kbit (Ecma 340).
Set to logic 1, the modulation for transmitting data is inverted.
Set to logic 1, the signal at pin SIGIN is mixed with the internal coder
(see
Defines the framing used for data transmission.
Value
00
01
10
11
dy
6
Section 12.6 “S
111336
TxSpeed
Description
106 kbit
212 kbit
424 kbit
848 kbit
1696 kbit
3392 kbit
Reserved
Reserved
Description
ISO/IEC 14443A/MIFARE and Passive Communication mode
106 kbit
Active Communication mode
FeliCa and Passive communication mode 212 and 424 kbit
ISO/IEC 14443B
dy
5
2
C interface
dy
4
InvMod
support”).
r/w
3
TxMix
r/w
2
Transmission module
© NXP B.V. 2011. All rights reserved.
dy
1
TxFraming
PN512
34 of 125
dy
0
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