PN5120A0HN/C2,518 NXP Semiconductors, PN5120A0HN/C2,518 Datasheet - Page 4

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PN5120A0HN/C2,518

Manufacturer Part Number
PN5120A0HN/C2,518
Description
IC TRANSMISSION MOD 40-HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PN5120A0HN/C2,518

Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
4. Quick reference data
Table 1.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
5. Ordering information
Table 2.
PN512
Product data sheet
COMPANY PUBLIC
Symbol
V
V
V
V
V
I
I
I
I
I
T
Type number
PN5120A0HN1/C2
PN5120A0HN/C2
pd
DDD
DDA
DD(PVDD)
DD(TVDD)
amb
DDA
DDD
DD(TVDD)
DD(PVDD)
DD(SVDD)
Supply voltages below 3 V reduce the performance in, for example, the achievable operating distance.
V
V
I
I
I
During typical circuit operation, the overall current is below 100 mA.
Typical value using a complementary driver configuration and an antenna matched to 40 Ω between pins TX1 and TX2 at 13.56 MHz.
pd
DD(PVDD)
DD(TVDD)
DDA
DD(PVDD)
is the total current for all supplies.
, V
DDD
Parameter
analog supply voltage
digital supply voltage
TVDD supply voltage
PVDD supply voltage
SVDD supply voltage
power-down current
digital supply current
analog supply current
PVDD supply current
TVDD supply current
Quick reference data
Ordering information
ambient temperature
depends on the overall load at the digital pins.
depends on V
must always be the same or lower voltage than V
and V
DD(TVDD)
Package
Name
HVQFN32
HVQFN40
DD(TVDD)
must always be the same voltage.
and the external circuit connected to pins TX1 and TX2.
Description
plastic thermal enhanced very thin quad flat package; no leads;
32 terminal; body 5 × 5 × 0.85 mm
plastic thermal enhanced very thin quad flat package; no leads;
40 terminals; body 6 × 6 × 0.85 mm
pin PVDD
Conditions
V
V
V
V
pin DVDD; V
pin AVDD; V
RcvOff bit = 0
pin AVDD; receiver switched off; V
CommandReg register’s RcvOff bit = 1
pin TVDD; continuous wave
HVQFN32, HVQFN40
DD(PVDD)
SSA
SSA
DDA
hard power-down; pin NRSTPD set LOW
soft power-down; RF level detector on
All information provided in this document is subject to legal disclaimers.
= V
= V
= V
SSD
SSD
DDD
≤ V
Rev. 3.6 — 10 March 2011
DDA
DDD
= V
= V
= V
DDA
SS(PVSS)
SS(PVSS)
= 3 V, CommandReg register’s
DD(TVDD)
= 3 V
= V
DDD
111336
DDD
.
= V
= V
= V
= V
SS(TVSS)
SS(TVSS)
DD(PVDD)
DD(TVDD)
DDA
= 0 V
= 0 V
;
= 3 V
= 3 V,
[6][7][8]
[1][2]
[3]
[4]
[4]
[5]
Min
2.5
1.6
1.6
-
-
-
-
-
-
-
−30
Transmission module
Typ
-
-
-
-
-
6.5
7
3
-
60
© NXP B.V. 2011. All rights reserved.
PN512
Max
3.6
3.6
3.6
5
10
9
10
5
40
100
+85
Version
SOT617-1
SOT618-1
4 of 125
Unit
V
V
V
μA
μA
mA
mA
mA
mA
mA
°C

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