PCF8562TT/2,518 NXP Semiconductors, PCF8562TT/2,518 Datasheet - Page 21

• Manufacturer Part Number: PCF8562TT/2,518
• Description: LCD Drivers LCD DRIVER 32/128SEG
• Manufacturer: NXP Semiconductors

Specifications of PCF8562TT/2,518

• Number Of Digits: 16
• Number Of Segments: 128
• Maximum Clock Frequency: 400 KHz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Package / Case: TSSOP-48
• Maximum Supply Current: 20 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935276218518 PCF8562TT/2-T

NXP Semiconductors
PCF8562_5
Product data sheet
7.16.6 Input filters
7.16.7 I
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
Two I
The least significant bit of the slave address that a PCF8562 will respond to is defined by
the level tied to its SA0 input. The PCF8562 is a write-only device and will not respond to
a read access.
The I
condition (S) from the I
slave addresses available. All PCF8562s whose SA0 inputs correspond to bit 0 of the
slave address respond by asserting an acknowledge in parallel. This I
ignored by all PCF8562s whose SA0 inputs are set to the alternative level.
After an acknowledgement, one or more command bytes follow, that define the status of
each addressed PCF8562.
The last command byte sent is identified by resetting its most significant bit, continuation
bit C, (see
PCF8562s on the bus.
After the last command byte, one or more display data bytes may follow. Display data
bytes are stored in the display RAM at the address specified by the data pointer and the
subaddress counter. Both data pointer and subaddress counter are automatically
updated.
2
Fig 15. I
Fig 16. Format of command byte
C-bus protocol
2
2
C-bus protocol is shown in
C-bus slave addresses (0111 000 and 0111 001) are reserved for the PCF8562.
2
S
C-bus protocol
Figure
0 1 1 1 0 0
slave address
All information provided in this document is subject to legal disclaimers.
16). The command bytes are also acknowledged by all addressed
1 byte
2
Rev. 05 — 19 May 2010
C-bus master which is followed by one of two possible PCF8562
S
A
0
R/W
MSB
0 A C
C
Figure
acknowledge by
all addressed
PCF8576Ds
n
COMMAND
≥ 1 byte(s)
REST OF OPCODE
15. The sequence is initiated with a START
Universal LCD driver for low multiplex rates
A
msa833
DISPLAY DATA
n
LSB
≥ 0 byte(s)
by A0, A1 and A2
update data pointers
subaddress counter
PCF8576D only
and if necessary,
acknowledge
selected
2
PCF8562
C-bus transfer is
© NXP B.V. 2010. All rights reserved.
A
P
mdb078
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