EMIF06-AUD01F2 STMicroelectronics, EMIF06-AUD01F2 Datasheet

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EMIF06-AUD01F2

Manufacturer Part Number
EMIF06-AUD01F2
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of EMIF06-AUD01F2

Mounting Style
Surface Mount
Termination
Flat Style
Operating Temp Range
-40C to 85C
Product Height (mm)
0.65mm
Product Depth (mm)
1.92mm
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EMIF06-AUD01F2
Manufacturer:
JST
Quantity:
30 000
Features
Benefits
Complies with following standards
Applications
ESD protection and EMI/RFI filtering for the audio
bottom connector interface, where EMI filtering in
ESD sensitive equipment is required:
February 2008
4-line EMI filter and ESD protection for internal
and external (headset) microphone
2-line EMI filter and ESD protection for headset
speaker
EMI (I/O) low-pass filter
High efficiency EMI filter
Very low PCB space consumption: 4.6 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and wafer level packaging
IEC 61000-4-2 level 4 external pins
– 15 kV (air discharge)
– 8 kV (contact discharge)
IEC 61000-4-2 level 1 internal pins
– 2 kV (air discharge)
– 2 kV (contact discharge)
Mobile phones and communication systems
Wireless modules
6-line EMI filter and ESD protection for audio interface
2
Rev 1
Description
The EMIF06-AUD01F2 is a highly integrated
device designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interference. The flip chip packaging means the
package size is equal to the die size.
This filter includes ESD protection circuitry, which
prevents damage to the application when it is
subjected to ESD surges up to 15 kV.
Figure 1.
A
B
C
D
MIC1P
MIC1N
MIC1N
Flip chip package, 20 bumps
GND
1
int
Pin configuration
EMIF06-AUD01F2
MIC2N
MIC1P
BIAS3
BIAS1
2
int
Silicon side
MIC2N
MIC2P
MIC2P
GND
3
Int
int
int
SPK_R
SPK_R
HOOK
BIAS2
int
4
SPK_L
SPK_L
GND
PHG
int
5
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EMIF06-AUD01F2 Summary of contents

Page 1

... February 2008 EMIF06-AUD01F2 2 Flip chip package, 20 bumps Description The EMIF06-AUD01F2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The flip chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges ...

Page 2

... R4 C2 GND-ext MIC1_P-ext C4 MIC1_N-ext R8 R9 R10 SPK_R-ext R12 C5 R13 SPK_L-ext R11 C6 GND-ext 1.3 nF typical Parameter = 25 °C) amb RM EMIF06-AUD01F2 HOOK BIAS2 MIC2_P-int MIC2_N-int GND-int BIAS1 MIC1_P-int MIC1_N-int BIAS3 SPK_R-int PHG (Phantom Ground) SPK_L-int Test Min conditions °C amb °C amb °C amb ...

Page 3

... EMIF06-AUD01F2 Table 3. Electrical characteristics - values (T Symbol V Diode reverse breakdown voltage BR Leakage current through clamping I RM diodes (1) C1-C4 Capacitance on MIC lines (1) C5-C6 Channel Capacitance SPK_L, SPK_R (2) R1 Hook Pull up resistance (2) R2 External Microphone Pull up resistance (2) R3,R4, R7, R8 Microphone Serial Resistance Internal Microphone Pull up and ...

Page 4

... R R source load = 50 Ω source load Figure -10 -20 -30 -40 -50 -60 100.0M 1.0G Ω Ω source load EMIF06-AUD01F2 Attenuation Min Typ = 1 kΩ kΩ kΩ kΩ kΩ 25 Attenuation Min Typ = 1 kΩ kΩ kΩ kΩ 20 S21 attenuation measurement MIC1_P and MIC1_N lines (50 Ω ...

Page 5

... EMIF06-AUD01F2 Figure 5. S21 attenuation measurement MIC2_P and MIC2_N lines (50 Ω Ω) 0.00 dB -10.00 -20.00 -30.00 -40.00 -50.00 F/Hz -60.00 100.0k 1.0M 10.0M MIC2_P line MIC2_N line Figure 7. S21 attenuation measurement SPK_L and SPK_R lines (50 Ω Ω) 0. 10.00 - 20.00 - 30.00 - 40.00 - 50.00 F/ ...

Page 6

... source load Figure 14. ESD response to IEC 61000-4-2 in Mic1 line V V/d 100 ns/d Figure 16. ESD response to IEC 61000-4-2 in Mic2 line V V/d 100 ns/d EMIF06-AUD01F2 MIC2_P and BIAS2 lines (50 Ω KΩ simulation) 0.00 dB F/Hz 100.0k 1.0M 10.0M 100.0M 1.0G Ω Mic2P/BIAS2 1k source (-15 kV air discharge) on input V ...

Page 7

... EMIF06-AUD01F2 1.4 Filter characteristics Figure 17. Analog crosstalk MIC2_P and MIC1_N lines (50 Ω Ω) 0.00 dB -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 F/Hz -100.00 100.0k 1.0M 10.0M MIC2_N/MIC1_P 1.5 Total harmonic distortion characteristics Figure 19. Total harmonic distortion and noise with only cables and environmental ...

Page 8

... EMIF06-AUD01F2 MIC1P MIC1P MIC1N MIC1N MIC1Nint MIC1Nint EMIF06-AUD01F2 EMIF06-AUD01F2 MIC1P MIC1P MIC1Pint MIC1Pint EMIF06-AUD01F2 distortion and noise in microphone lines versus frequency, unbalanced (or single-ended) mode -61.510 V GEN : 1 < F < 20 kHz Ω R GEN : 600 Ω R LOAD : 100 k A-Weighting filter Bandwidth: 40 kHz T AMB = 25 ° ...

Page 9

... EMIF06-AUD01F2 2 Application schematics Figure 25. Basic configuration scheme Figure 26. Stereo line MIC2_P R3 C1 MIC2_N R4 C2 GND MIC1_P C4 MIC1_N R8 R9 SPK_R R10 C5 R12 R13 SPK_L R11 C6 GND R1 R2 MIC2_P R3 C1 MIC2_N R4 C2 GND R6 C3 MIC1_P R7 C4 MIC1_N R8 R9 SPK_R R10 C5 R12 R13 SPK_L ...

Page 10

... R1 R2 MIC2_P R3 C1 MIC2_N R4 C2 GND MIC1_P C4 MIC1_N R8 R9 SPK_R R10 C5 R12 R13 SPK_L R11 C6 GND EMIF06-AUD01F2 HOOK BIAS2 MIC2_P-int MIC2_N-int GND-int BIAS1 MIC1_P-int MIC1_N-int BIAS3 + SPK_R-int PHG (Phantom Ground) + SPK_L-int HOOK BIAS2 MIC2_P-int MIC2_N-int GND-int BIAS1 MIC1_P-int MIC1_N-int BIAS3 + SPK_R-int ...

Page 11

... EMIF06-AUD01F2 3 Ordering information scheme Figure 29. Ordering information scheme EMI Filter Number of lines Information 3 letters = application 2 digits = version Package F = Flip-Chip x 4 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97 ...

Page 12

... Dot identifying Pin A1 location 4.0 ± 0.1 2.0 ± 0.05 User direction of unreeling EMIF06-AUD01F2 Copper pad Diameter: 250µm recommended, 300 µm max Solder stencil opening: 330 µm Ø 1.55 ± 0.05 2.10 4 ± ...

Page 13

... EMIF06-AUD01F2 5 Ordering information Table 6. Ordering information Ordering code EMIF06-AUD01F2 6 Revision history Table 7. Document revision history Date 18-Feb-2008 Marking Package Weight HP Flip chip 6.45 mg Revision 1 First issue Ordering information Base qty Delivery mode 5000 7” Tape and reel Changes 13/14 ...

Page 14

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 14/14 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com EMIF06-AUD01F2 ...

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