CRD-49530-USB Cirrus Logic Inc, CRD-49530-USB Datasheet - Page 11

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CRD-49530-USB

Manufacturer Part Number
CRD-49530-USB
Description
Audio Modules & Development Tools Eval Bd 32-Bit Aud Dcdr & Prgrmble DSP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CRD-49530-USB

Product
Audio Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS705RD3
1.3.10.1 Clock and Data Flow for ADC Input
1.3.10 Audio Clocking
but Cirrus recommends using serial flash for all systems. Adding a parallel flash makes the routing of the
SDRAM bus much more complicated.
Clocking architecture is one of the most important aspects of an audio system. The input and output clock
domains of the DSP must be synchronous when delivering audio data in an isochronous fashion (constant
bitrate delivery), even if the input/output domains operate at different frequencies (e.g. 48 kHz input/96
kHz output). Systems utilizing I
isochronous delivery.
The requirements are slightly more complicated for systems using “bursty” delivery on the input side of the
DSP, but the CRD49530 is designed to emulate isochronous systems.
The CRD49530 can operate in three different clocking modes. Each of these modes is explained in the
following sections.
The ADC clocking architecture is used when the ADCs are used as the only audio input (i.e. S/PDIF is
disabled as described in
(U1, U2) is used to select on-board audio sources.
XTAL_OUT from the CS4953xx is MCLK for the system, and the codec masters the input clocks
(MUXED_SCLK/MUXED_LRCLK) of the CS4953xx. The system routing of the clocks was simplified by
using the CS8416 to drive MCLK to the system, but the internal clock multiplexer of the CS8416 is forced
to the OMCK setting to pass XTAL_OUT.
DAI
CS4953xx
CS8416
"USB (I2S) Audio Input" on page
DAO
2
S delivery of S/PDIF input, ADC input, or other digital audio input use
MUXED_DAI[3:0]
MUXED_LRCLK
MUXED_SCLK
S/PDIF Input
MUXED_MCLK
DSP_SCLK
DSP_LRCLK
DSP_DA0[3:0]
Figure 1-3. ADC Clocking
Copyright 2008 Cirrus Logic
Figure 1-3
4-5), and the audio input source multiplexer
illustrates this clocking configuration.
CRD49530-USB System Description
SDIN
SDOUT
CS42448
CRD49530-USB User’s Manual
1-6

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