71M6521DEIM-DB Maxim Integrated Products, 71M6521DEIM-DB Datasheet - Page 133
71M6521DEIM-DB
Manufacturer Part Number
71M6521DEIM-DB
Description
Power Management Modules & Development Tools 71M6521DE DEMO BOARD M6521DE DEMO BOARD
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6521DE-DB.pdf
(138 pages)
Specifications of 71M6521DEIM-DB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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71M652X Software User’s Guide
The vectors associated with each interrupt source are displayed in Table 6-59.
The external interrupts 4, 5 and 6 are activated by a positive transition. The external source must hold the request pin
low (high for int2 and int3, if it is programmed to be negative transition-active) for at least one MPU clock period.
Afterwards, it must be held high (low) for at least one MPU clock period to ensure the transition is recognized and the
corresponding interrupt request flag is set.
Revision 1.7
6.3.5.5
External Interrupt Edge Detect
Interrupt Sources and Vectors
IE0 – External interrupt 0
TF0 – Timer 0 interrupt
IE1 – External interrupt 1
TF1 – Timer 1 interrupt
RI0/TI0 – UART 0 interrupt
RI1/TIi1 – UART 1 interrupt
IEX2 – External interrupt 2
IEX3 – External interrupt 3
IEX4 – External interrupt 4
IEX5 – External interrupt 5
IEX6 – External interrupt 6
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
Interrupt Request Flags
Table 6-59: Polling Sequence
External interrupt 1
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
Table 6-60: Interrupt Vectors
UART 0 interrupt
Timer 1 interrupt
TERIDIAN Proprietary
Interrupt Vector
Address
0003H
000BH
0013H
001BH
0023H
0083H
004BH
0053H
005BH
0063H
006BH
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