LPD-SOM-CLIP1 Logic, LPD-SOM-CLIP1 Datasheet - Page 23

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LPD-SOM-CLIP1

Manufacturer Part Number
LPD-SOM-CLIP1
Description
CLIP RETENTION PLATE
Manufacturer
Logic
Datasheet

Specifications of LPD-SOM-CLIP1

Accessory Type
Retention Clip
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
SOM-M1
Other names
460-3502
7
7.1
J1 Pin# SOM Net Name
1
2
3
4
5
6
7
8
PN 1013755 Rev 5
Pin Descriptions & Functions
SOM Net Name: This is the name used in Logic’s OMAP-L138
Processor Name: This is the name used TI’s OMAP-L138 Low-Power Applications Processor
Datasheet.
I/O: This indicates the default pin configuration after booting U-Boot. Most pins can be
reconfigured as either input or output. Consult Logic’s OMAP-L138
OMAP-L138 Low-Power Applications Processor Datasheet for more information.
Description: If a pull-up or pull-down resistor is present on the OMAP-L138 SOM-M1, it will be
noted here. Special usage tips and cautions will be noted here. Consult Logic’s OMAP-L138
SOM-M1
more information.
J1 Connector 100-Pin Descriptions
uP_VPIF_DOUT8
uP_VPIF_DOUT0
uP_VPIF_DOUT9
uP_VPIF_DOUT1
uP_VPIF_DOUT10
uP_VPIF_DOUT2
uP_VPIF_DOUT11
uP_VPIF_DOUT3
Schematics and TI’s OMAP-L138 Low-Power Applications Processor Datasheet for
Logic Product Development Company, All Rights Reserved
PRELIMINARY DOCUMENT—SUBJECT TO CHANGE
Processor Name
VP_DOUT[8]/
LCD_D[8]/
UPP_XD[0]/
GP7[0]/ BOOT[0]
VP_DOUT[0]/
LCD_D[0]/
UPP_XD[8]/
GP7[8]
VP_DOUT[9]/
LCD_D[9]/
UPP_XD[1]/
GP7[1]/ BOOT[1]
VP_DOUT[1]/
LCD_D[1]/
UPP_XD[9]/
GP7[9]
VP_DOUT[10]/
LCD_D[10]/
UPP_XD[2]/
GP7[2]/ BOOT[2]
VP_DOUT[2]/
LCD_D[2]/
UPP_XD[10]/
GP7[10]
VP_DOUT[11]/
LCD_D[11]/
UPP_XD[3]/
GP7[3]/ BOOT[3]
VP_DOUT[3]/
LCD_D[3]/
UPP_XD[11]/
GP7[11]
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
I/O Voltage
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
OMAP-L138 SOM-M1 Hardware Specification
Description
LCD G3 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-down on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD B1 data bit when outputting RGB565
data to an RGB666 display.
LCD_G4 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-down on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_B2 data bit when outputting RGB565
data to an RGB666 display.
LCD_G5 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-up on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_B3 data bit when outputting RGB565
data to an RGB666 display.
LCD_R1 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-up on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_B4 data bit when outputting RGB565
data to an RGB666 display.
SOM-M1
SOM-M1
Schematics.
Schematics and TI’s
18

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