74F382PC Fairchild Semiconductor, 74F382PC Datasheet

IC ARITHMETIC LOGIC 4BIT 20-DIP

74F382PC

Manufacturer Part Number
74F382PC
Description
IC ARITHMETIC LOGIC 4BIT 20-DIP
Manufacturer
Fairchild Semiconductor
Series
74Fr
Datasheet

Specifications of 74F382PC

Logic Type
Arithmetic Logic Unit
Supply Voltage
4.5 V ~ 5.5 V
Number Of Bits
4
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74F382

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74F382PC
Manufacturer:
FAIRCHILD
Quantity:
5 000
© 2004 Fairchild Semiconductor Corporation
74F382SC
74F382SJ
74F382PC
74F382
4-Bit Arithmetic Logic Unit
General Description
The 74F382 performs three arithmetic and three logic oper-
ations on two 4-bit words, A and B. Two additional Select
input codes force the Function outputs LOW or HIGH. An
Overflow output is provided for convenience in twos com-
plement arithmetic. A Carry output is provided for ripple
expansion. For high-speed expansion using a Carry
Lookahead Generator, refer to the 74F381 data sheet.
Ordering Code:
Logic Symbols
Order Number
Package Number
IEEE/IEC
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS009529
Features
Connection Diagram
Performs six arithmetic and logic functions
Selectable LOW (clear) and HIGH (preset) functions
LOW input loading minimizes drive requirements
Carry output for ripple expansion
Overflow output for twos complement arithmetic
Package Description
May 1988
Revised January 2004
www.fairchildsemi.com

Related parts for 74F382PC

74F382PC Summary of contents

Page 1

... M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74F382SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F382PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Logic Symbols IEEE/IEC © 2004 Fairchild Semiconductor Corporation ...

Page 2

Unit Loading/Fan Out Pin Names A –A A Operand Inputs –B B Operand Inputs –S Function Select Inputs Carry Input n C Carry Output n 4 OVR Overflow Output F –F ...

Page 3

Truth Table Inputs Function CLEAR MINUS MINUS PLUS ...

Page 4

Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 4 ...

Page 5

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 6

AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH PHL Propagation Delay PLH t Any Any F PHL t Propagation Delay PLH PHL i i ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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