ST92163-EMU2 STMicroelectronics, ST92163-EMU2 Datasheet - Page 2

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ST92163-EMU2

Manufacturer Part Number
ST92163-EMU2
Description
MCU, MPU & DSP Development Tools ST9 Emulator Board
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST92163-EMU2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DEVELOPING ST92F250 APPLICATIONS USING THE ST92F150-EMU2 EMULATOR
1 ST92F250 VERSUS ST92F150
Table 1. ST92F250CV2 versus ST92F150JDV1
1.1 SCI-A LIN MASTER
A Local Interconnect Network (LIN) Message Frame starts with a 13-bit Synch Break.
Software LIN Master solutions are based on a standard asynchronous Serial Communication
Interface that generates a 10-bit break (continuous dominant low level).
Some software workarounds exist, for instance changing the baud rate before sending a
Synch Break, but they have some limitations and they increase the code size. The ST92F250
SCI-A has a hardware feature for generating a 13-bit Synch Break this is possible in LIN
Master mode which is entered by setting the LINE bit (bit 6 of the SCICR3 Register, R255
page 26).
2/8
2
J1850 (JBLPD) Interface
IO and AS/DS/RW drive
AVDD Parasitic Diode
Flash Memory Size
P30, P66 and P67
IO reset behavior
SCI-A LIN Master
WKUP6 mapping
CAN Interfaces
I2C Interfaces
Emulation
RAM Size
A[18:17]
Feature
Refer to the Errata Sheet
Refer to the Errata Sheet
Standard or High Drive
ST92F150JDV1
Programmable:
128 Kbytes
Available
P51/RX1
6 Kbytes
Yes,
Yes
Yes
No
No
2
1
Not Available when the I²C_1 is in
use (when I2CCR.PE bit is set).
except P46 P47 P64 P65
Refer to the Datasheet
ST92F250CV2
256 Kbytes
Standard:
8 Kbytes
P51
Yes
Yes
No
No
No
1
2

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