PAC-SYSPOWR1220AT8 Lattice, PAC-SYSPOWR1220AT8 Datasheet

PAC-SYSPOWR1220AT8

Manufacturer Part Number

PAC-SYSPOWR1220AT8

Description

MCU, MPU & DSP Development Tools ispPAC Pwr Mgr 1220A T8 Design System

Manufacturer

Lattice

Datasheet

1.PAC-SYSPOWR1220AT8.pdf (10 pages)

Specifications of PAC-SYSPOWR1220AT8

Processor To Be Evaluated

ispPACPOWR1220AT8

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current page: 1 of 10
Download datasheet (306Kb)

March 2007

Introduction

Lattice Semiconductor’s Power Manager II ispPAC

grating the analog and digital functions of power supply management (sequencing, monitoring, trimming/margin-

ing, measurement) into a single device. This device provides designers with a rich set of features: A/D and D/A

conversion, precision comparators with a built-in voltage reference, MOSFET drivers with programmable slew

rates, an easy-to-use closed-loop power supply voltage trim system, and a programmable logic device (PLD) for

sequencing and supervisory logic functions. All of these blocks can be accessed via I

systems employing an on-board microcontroller. Conﬁguration for all subsystems in the ispPAC-POWR1220AT8

device is stored in non-volatile E

IEEE 1149.1 interface.

PAC-POWR1220AT8-EV Evaluation Board

The PAC-POWR1220AT8-EV evaluation board (Figure 1) allows the designer to quickly conﬁgure and evaluate the

ispPAC-POWR1220AT8 device on a fully assembled printed-circuit board. The four-layer board supports a 100-pin

TQFP package, pads for user I/O, a JTAG programming cable connector, and a connector for the device's I

face. JTAG programming signals can be generated by using an ispDOWNLOAD

between the evaluation board and a PC’s parallel (printer) port. Both analog and digital features of the ispPAC-

POWR1220AT8 device can be easily conﬁgured using PAC-Designer

4” (12.5 x 10 cm).

The I

to allow designers to evaluate the device’s I

More information about this software tool can be found in application note AN6067, ispPAC-POWR1220AT8 I

Hardware Veriﬁcation Utility Users Guide. Extra pads are provided adjacent to the I

easily access the SDA and SCL signals as well as the regulated 3.3 volt VCC supply. Connection to a standard I

bus or cable is done simply by connecting to the SDA, SCL, and GND pins of J5; pin #3 is left ﬂoating. Connection

to an ispDOWNLOAD cable is done simply by mating the ispDOWNLOAD cable’s connector to the I

Figure 1. PAC-POWR1220AT8-EV Evaluation Board

or product names are trademarks or registered trademarks of their respective holders. The speciﬁcations and information herein are subject to change without notice.

www.latticesemi.com

C bus. The I

C interface includes circuitry to allow the use of either an ispDOWNLOAD cable or standard open collector

C software utility that is included in PAC-Designer makes use of the ispDOWNLOAD cable interface

CMOS

memory. Programming is performed via the industry-standard JTAG

C capabilities without having to buy additional cables or adapters.

-POWR1220AT8 device simpliﬁes power supply design by inte-

software. The actual size of the board is 5” x

PAC-POWR1220AT8-EV

Evaluation Board

C connector to allow the user to

programming cable connected

C for enhanced ﬂexibility in

Application Note AN6065

C header (J5).

an6065_01.2

C inter-

Related parts for PAC-SYSPOWR1220AT8

PAC-SYSPOWR1220AT8 Summary of contents

Page 1

... TQFP package, pads for user I/O, a JTAG programming cable connector, and a connector for the device's I face. JTAG programming signals can be generated by using an ispDOWNLOAD between the evaluation board and a PC’s parallel (printer) port. Both analog and digital features of the ispPAC- POWR1220AT8 device can be easily conﬁgured using PAC-Designer 4” ...

Page 2

... C bus connection (with on-board 2K pull-ups to 3.3V), it may also be driven by the Lattice DL2download cable when the “Power Manager I Access to a subset of the ispPAC-POWR1220AT8 device’s I/O pins is available along the left edge of the assembly, where a 2x34 block of pads supports the attachment of test probes or a ribbon-cable connector. Pads for accessing the ATDI and TDISEL signals are provided immediately below the JTAG header (J4) ...

Page 3

... Several red LEDs are also provided on the evaluation board to indicate proper function and as aids to debugging. LED D2 indicates that the on-board 3.3V supply is powered up. LED D3 is connected to the ispPAC- POWR1220AT8 device’s TDO line, and will brieﬂy ﬂash when downloading, indicating that download data has made it to the device ...

Page 4

... J2 GND BANANA (BLACK) J1 5mm + Power Jack Figure 4. LED Indicators and I +3. ‘PWR’ OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT17 OUT18 OUT19 OUT20 TDO RESET SDA SCL ATDI PAC-POWR1220AT8-EV Evaluation Board 0.1µF C1 10µ Port Interface OUT11 OUT12 OUT13 OUT14 ...

Page 5

... Lattice Semiconductor Figure 5. User Controls R13 1k VPS1 R14 1k VPS0 R15 1k TDISEL R16 1k IN1 R17 1k IN2 R18 1k IN3 VMON12 VMON11 R19 1k IN4 R20 1k IN5 PAC-POWR1220AT8-EV Evaluation Board +3.3V +3.3V VMON12 R8 1k R10 220 C10 0.1uF +3.3V R7 VMON11 1k R9 220 C9 0.1uF ...

Page 6

... IN3 IN3 4 IN4 IN4 6 IN5 IN5 7 IN6 IN6 95 PLDCLK PLDCLK 96 MCLK MCLK 89 VPS0 VPS0 90 VPS1 VPS1 93 SDA SDA 92 SCL SCL 91 RESETb RESETb 39 VCCPROG VCCPROG PAC-POWR1220AT8-EV Evaluation Board +3. HVOUT1 HVOUT2 HVOUT3 HVOUT4 OUT5/SMBA U1 ispPAC- POWR1220AT8 TDISEL +3. 0.1uF 0.1uF 0.1uF 0.1uF (94) (13) (38) ...

Page 7

... Lattice Semiconductor PCB Artwork Figure 7. Silk Screen Figure 8. Component Side Copper (Layer 1) PAC-POWR1220AT8-EV Evaluation Board 7 ...

Page 8

... Lattice Semiconductor Figure 9. Ground Plane (Layer 2) Figure 10. Power Plane (Layer 3) PAC-POWR1220AT8-EV Evaluation Board 8 ...

Page 9

... Nichicon F931A106MBA 0.1µF 0603 SMD cap, Panasonic ECJ-1VB1C104K Schottky diode, International Rectiﬁer MBRS130LTR Red LED, SMD1206 package, LiteOn LTST-C150KRKT 5mm DC power connector, CUI PJ-102BH Banana Jack, red, SPC Technology 845-R Banana Jack, Black, SPC Technology 845-B ...

Page 10

... Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The speciﬁcations and information herein are subject to change without notice. PAC-POWR1220AT8-EV Evaluation Board Ordering Part Number PAC-SYSPOWR1220AT8 Version — Previous Lattice releases. 01.2 ...

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