APA-ISP-DEMO Actel, APA-ISP-DEMO Datasheet - Page 25

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APA-ISP-DEMO

Manufacturer Part Number
APA-ISP-DEMO
Description
MCU, MPU & DSP Development Tools ProAsic Plus
Manufacturer
Actel
Datasheet

Specifications of APA-ISP-DEMO

Processor To Be Evaluated
APA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 2-15 • Using the PLL to Delay the Input Clock
Figure 2-16 • Using the PLL to Advance the Input Clock
Global MUX B OUT
Global MUX A OUT
External Feedback
Global MUX B OUT
Global MUX A OUT
External Feedback
133 MHz
133 MHz
÷1
÷m
÷n
÷1
÷1
÷m
÷n
÷1
D
D
PLL Core
PLL Core
v5.9
D
D
180
0
180
0
˚
˚
˚
˚
÷u
÷v
÷1
÷u
÷v
÷1
ProASIC
133 MHz
133 MHz
D
D
D
D
PLUS
GLB
GLA
Flash Family FPGAs
GLB
GLA
2-15

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