APA-EVAL-KIT Actel, APA-EVAL-KIT Datasheet - Page 34
APA-EVAL-KIT
Manufacturer Part Number
APA-EVAL-KIT
Description
MCU, MPU & DSP Development Tools ProAsic Plus Eval Kit
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA-EVAL-KIT
Processor To Be Evaluated
APA
Interface Type
ISP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 2-20 • APA1000 Memory Block Architecture
Figure 2-21 • Example Showing Memory Arrays with Different Widths and Depths
Figure 2-22 • Multi-Port Memory Usage
2 -2 4
ProASIC
PLUS
Flash Family FPGAs
1,024 words x 9 bits, 1 read, 1 write
Depth
Word
Depth
Word
Read Ports
512 words x 9 bits, 4 read, 1 write
Total Memory Blocks Used = 10
Total Memory Bits = 6,912
Word Width
Depth
Word
256
256
256
256
256
9
Word Width
9
256
256
256
9
512 words x 18 bits, 1 read, 1 write
256
256
9
9
9
256
256
256
9
9
9
9
Word Width
256
256
256
256
256
9
9
9
256
256
88 blocks
v5.9
Write Port
9
256 words x 9 bits, 2 read, 1 write
256
9
256 words x 18 bits, 1 read, 1 write
256
9
256
Total Memory Blocks Used = 10
Total Memory Bits = 23,040
256
9
256
9
256
9
9
256
Read Ports
9
256
Write Port
9
9
256
9
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