APA-EVAL-KIT Actel, APA-EVAL-KIT Datasheet - Page 67
APA-EVAL-KIT
Manufacturer Part Number
APA-EVAL-KIT
Description
MCU, MPU & DSP Development Tools ProAsic Plus Eval Kit
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA-EVAL-KIT
Processor To Be Evaluated
APA
Interface Type
ISP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Asynchronous SRAM Write
Note: The plot shows the normal operation status.
Figure 2-30 • Asynchronous SRAM Write
Table 2-54 • T
Symbol t
AWRH
AWRS
DWRH
DWRS
DWRS
WPDA
WPDH
WRCYC
WRMH
WRML
xxx
T
J
J
= 0°C to 110°C; V
= –55°C to 150°C, V
DI setup to WB ↑
DI setup to WB ↑
WADDR hold from WB ↑
WADDR setup to WB ↓
DI hold from WB ↑
WPE access from DI
WPE hold from DI
Cycle time
WB high phase
WB low phase
WRB, WBLKB
Description
WADDR
DD
WPE
DD
= 2.3 V to 2.7 V for Commercial/Industrial
t AWRS
DI
t WPDA
= 2.3 V to 2.7 V for Military/MIL-STD-883B
t WRML
Min.
v5.9
1.0
0.5
1.5
0.5
2.5
3.0
7.5
3.0
3.0
t DWRS
t WRCYC
Max.
1.0
t WRMH
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ProASIC
t AWRH
t DWRH
t WPDH
PARGEN is inactive.
PARGEN is active.
WPE is invalid, while PARGEN is
active.
Inactive
Active
PLUS
Flash Family FPGAs
Notes
2-57
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