Si4720-A-EVB Silicon Laboratories Inc, Si4720-A-EVB Datasheet - Page 7

• Manufacturer Part Number: Si4720-A-EVB
• Description: WiFi / 802.11 Modules & Development Tools Si4720 Eval Board Use Si4721-A-EVB.
• Manufacturer: Silicon Laboratories Inc

Specifications of Si4720-A-EVB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4. Reset Timing Characteristics
(V
Parameter
RST Pulse Width and GPO1, GPO2/INT Setup to RST↑
GPO1, GPO2/INT Hold from RST↑
Important Notes:
DD
1. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is
2. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until
3. When selecting 3-wire or SPI modes, the user must ensure that a rising edge of SCLK does not occur within 300 ns
4. If GPO1 and GPO2 are actively driven by the user, then minimum t
= 2.7 to 5.5 V, V
high) does not occur within 300 ns before the rising edge of RST.
after the 1st start condition.
before the rising edge of RST.
minimum t
GPO2 low.
SRST
IO
is 100 µs, to provide time for on-chip 1 MΩ devices (active while RST is low) to pull GPO1 high and
= 1.5 to 3.6 V, T
Figure 1. Reset Timing Parameters for Busmode Select
GPO2/
GPO1
A
RST
= –20 to 85 °C)
INT
70%
30%
70%
30%
70%
30%
1,2,3
Rev. 1.0
4
t
SRST
Symbol
t
t
HRST
SRST
t
HRST
SRST
is only 30 ns. If GPO1 or GPO2 is hi-Z, then
Min
100
30
Si4720/21-B20
Typ
—
—
Max
—
—
Unit
µs
ns
7