PUMD15 T/R NXP Semiconductors, PUMD15 T/R Datasheet - Page 3

Digital Transistors TRNS DOUBL RET TAPE7

PUMD15 T/R

Manufacturer Part Number
PUMD15 T/R
Description
Digital Transistors TRNS DOUBL RET TAPE7
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMD15 T/R

Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
4.7 KOhms
Typical Resistor Ratio
1
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PUMD15,115
NXP Semiconductors
5. Limiting values
PEMD15_PUMD15_3
Product data sheet
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
Symbol
Per transistor; for the PNP transistor with negative polarity
V
V
V
V
I
I
P
T
T
T
Per device
P
O
CM
stg
j
amb
CBO
CEO
EBO
I
tot
tot
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Reflow soldering is the only recommended soldering method.
Limiting values
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage TR1
input voltage TR2
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
ambient temperature
total power dissipation
positive
negative
positive
negative
SOT363
SOT666
SOT363
SOT666
NPN/PNP resistor-equipped transistors; R1 = 4.7 k , R2 = 4.7 k
Rev. 03 — 2 September 2009
Conditions
open emitter
open base
open collector
T
T
amb
amb
25 C
25 C
PEMD15; PUMD15
[1][2]
[1][2]
[1]
[1]
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
65
65
© NXP B.V. 2009. All rights reserved.
Max
50
50
10
+30
+10
100
100
200
200
+150
150
+150
300
300
10
30
Unit
V
V
V
V
V
V
V
mA
mA
mW
mW
mW
mW
C
C
C
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