PUMD3 /T2 NXP Semiconductors, PUMD3 /T2 Datasheet - Page 8

Digital Transistors TRANS RET DOUBLE TAPE-11 REV

PUMD3 /T2

Manufacturer Part Number
PUMD3 /T2
Description
Digital Transistors TRANS RET DOUBLE TAPE-11 REV
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMD3 /T2

Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
10 KOhms
Typical Resistor Ratio
1
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PUMD3,165
NXP Semiconductors
9. Packing information
PEMD3_PIMD3_PUMD3_10
Product data sheet
Table 9.
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
[2]
[3]
Type number Package Description
PEMD3
PIMD3
PUMD3
For further information and the availability of packing methods, see
T1: normal taping
T2: reverse taping
Packing methods
SOT666
SOT457
SOT363
Rev. 10 — 15 November 2009
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
2 mm pitch, 8 mm tape and reel
4 mm pitch, 8 mm tape and reel
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
PEMD3; PIMD3; PUMD3
Section
[2]
[3]
[2]
[3]
[1]
Packing quantity
3000 4000
-
-
-115
-125
-115
-125
12.
-
-115
-
-
-
-
© NXP B.V. 2009. All rights reserved.
8000 10000
-315 -
-
-
-
-
-
-
-135
-165
-135
-165
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