XC3S1500-4FG456C Xilinx Inc, XC3S1500-4FG456C Datasheet - Page 90

• Manufacturer Part Number: XC3S1500-4FG456C
• Description: FLASH
• Manufacturer: Xilinx Inc

Spartan-3 FPGA Family: DC and Switching Characteristics
Phase Shifter (PS)
Phase Shifter operation is only supported if the DLL is in the Low frequency mode, see
Table 61: Recommended Operating Conditions for the PS in Variable Phase Mode
Table 62: Switching Characteristics for the PS in Variable or Fixed Phase Shift Mode
90
Notes:
1.
2.
Operating Frequency Ranges
PSCLK_FREQ
(F
Input Pulse Requirements
PSCLK_PULSE
Phase Shifting Range
FINE_SHIFT_RANGE
Lock Time
LOCK_DLL_PS
LOCK_DLL_PS_FX
PSCLK
The numbers in this table are based on the operating conditions set forth in
The PS specifications in this table apply when the PS attribute CLKOUT_PHASE_SHIFT= VARIABLE or FIXED.
Symbol
Symbol
)
Frequency for the
PSCLK input
PSCLK pulse width
as a percentage of
the PSCLK period
Description
Phase shift range
When using the PS in conjunction
with the DLL: The time from
deassertion at the DCM’s Reset
input to the rising transition at its
LOCKED output. When the DCM
is locked, the CLKIN and CLKFB
signals are in phase.
When using the PS in conjunction
with the DLL and DFS: The time
from deassertion at the DCM’s
Reset input to the rising transition
at its LOCKED output. When the
DCM is locked, the CLKIN and
CLKFB signals are in phase.
Description
Revision
Device
All
All
Low
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60 MHz < F
Frequency Mode/
18 MHz < F
30 MHz < F
40 MHz < F
50 MHz < F
F
CLKIN
Frequency Mode/
F
F
F
CLKIN
CLKIN
Low
CLKIN
Range
CLKIN
Low
CLKIN
CLKIN
CLKIN
CLKIN
Low
< 100 MHz
> 100 MHz
Range
< 165 MHz
< 30 MHz
< 40 MHz
< 50 MHz
< 60 MHz
Table 31
40%
45%
and
Min
1
Min
Table
-
-
-
-
-
-
-
-5
Table
-5
60%
55%
Max
Speed Grade
167
61.
10.40
Speed Grade
Max
10.0
3.28
2.56
1.60
1.00
0.88
57.
DS099-3 (v2.2) May 25, 2007
40%
45%
Min
1
Min
Product Specification
-
-
-
-
-
-
-
-4
-4
Max
60%
55%
167
10.40
Max
10.0
3.28
2.56
1.60
1.00
0.88
Units
Units
MHz
ms
ms
ms
ms
ms
ms
ns
-
-
R