25AA512-I/MF Microchip Technology, 25AA512-I/MF Datasheet - Page 16

• Manufacturer Part Number: 25AA512-I/MF
• Description: 512k, 64K X 8 , 1.8V SER EE IND 8 DFN-S 6X5MM TUBE
• Manufacturer: Microchip Technology

Specifications of 25AA512-I/MF

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 512K (64K x 8)
• Speed: 20MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25AA512
2.9
The SECTOR
(FFh) inside the given sector. A Write Enable (WREN)
instruction must be given prior to attempting a SECTOR
ERASE. This is done by setting CS low and then clock-
ing out the proper instruction into the 25AA512. After
all eight bits of the instruction are transmitted, the CS
must be brought high to set the write enable latch.
The SECTOR ERASE instruction is entered by driving
CS low, followed by the instruction code (Figure 2-9)
and two address bytes. Any address inside the sector
to be erased is a valid address.
FIGURE 2-9:
DS22021F-page 16
SECTOR ERASE
ERASE instruction will erase all bits
SCK
SO
CS
SI
SECTOR ERASE SEQUENCE
0
0
1
1
0
Instruction
2
0
3
0
4
0
5
High-Impedance
1
6
0
7
15 14 13 12
8
CS must then be driven high after the last bit of the
address or the SECTOR ERASE will not execute. Once
the CS is driven high the self-timed SECTOR ERASE
cycle is started. The WIP bit in the STATUS register
can be read to determine when the SECTOR ERASE
cycle is complete.
If a SECTOR ERASE instruction is given to an address
that has been protected by the Block Protect bits (BP0,
BP1) then the sequence will be aborted and no erase
will occur.
See Table 2-3 for Sector Addressing.
9 10 11
16-bit Address
21 22 23
2
1
 2010 Microchip Technology Inc.
0