AD5292BRUZ-100 Analog Devices Inc, AD5292BRUZ-100 Datasheet - Page 29

• Manufacturer Part Number: AD5292BRUZ-100
• Description: 1024 Tap, 1% DigiPOT With SPI Interface
• Manufacturer: Analog Devices Inc

Specifications of AD5292BRUZ-100

• Design Resources: Variable Gain Noninverting Amplifier Using AD5292 and OP184 (CN0112) Variable Gain Inverting Amplifier Using AD5292 and OP184 (CN0113) Low Cost, High Voltage, Programmable Gain Instrumentation Amplifier Using AD5292 and AD8221 (CN0114) Programmable High Voltage Source with Boosted Output Current Using AD5292, OP184, and MOSFETs (CN0115) Programmable Bidirectional Current Source Using AD5292 and ADA4091-4 (CN0117) Logarithmic Audio Volume Control with Glitch Reduction Using AD5292 (CN0120)
• Taps: 1024
• Resistance (ohms): 100K
• Number Of Circuits: 1
• Temperature Coefficient: 35 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI Serial
• Voltage - Supply: 9 V ~ 33 V, ±9 V ~ 16.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Resistance In Ohms: 100K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AUDIO VOLUME CONTROL
The excellent THD performance and high voltage capability
make the AD5291 and AD5292 ideal for a digital volume
control as an audio attenuator or gain amplifier. A typical
problem in these systems is that a large step change in the
volume level at any arbitrary time can lead to an abrupt
discontinuity of the audio signal causing an audible zipper
noise. To prevent this, a zero-crossing window detector can be
inserted to the SYNC line to delay the device update until the
audio signal crosses the window. Because the input signal can
operate on top of any dc level rather than absolute zero volt
level, zero-crossing in this case means the signal is ac-coupled,
and the dc offset level is the signal zero reference point.
V
IN
1µF
C1
R
90kΩ
R
10kΩ
4
5
U6
AD8541
5V
V+
V–
100kΩ
1
2
Figure 74. Audio Volume Control with Zipper Noise Reduction
200Ω
R
R
1
2
CHANNEL 1
FREQ = 20.25kHz
1.03V p-p
R
100kΩ
5V
3
ADCMP371
ADCMP371
GND
GND
V
V
+5V
+5V
CC
CC
Figure 75. Zipper Noise Detector
U2
U3
Rev. D | Page 29 of 32
SYNC
4
5
U4B
7408
6
1
2
The configuration to reduce zipper noise is shown in Figure 74,
and the results of using this configuration is shown in Figure 75.
The input is ac-coupled by C1 and attenuated down before feeding
into the window comparator formed by U2, U3, and U4B. U6 is
used to establish the signal zero reference. The upper limit of
the comparator is set above its offset and, therefore, the output
pulses high whenever the input falls between 2.502 V and 2.497 V
(or 0.005 V window) in this example. This output is AND’ e d
with the SYNC signal such that the AD5291 and AD5292
updates whenever the signal crosses the window. To avoid a
constant update of the device, the SYNC signal should be
programmed as two pulses, rather than as one.
In Figure 75, the lower trace shows that the volume level changes
from a quarter-scale to full-scale when a signal change occurs
near the zero-crossing window.
U4A
7408
SCLK
+15V
0.1µF
0.1µF
SDIN
–15V
C3
C2
U1
V
V
SYNC
SCLK
SDIN
DD
SS
A
B
AD5292
20kΩ
W
GND
–15V
+15V
V–
V+
U5
V
OUT
AD5291/AD5292