AD5421CREZ-RL Analog Devices Inc, AD5421CREZ-RL Datasheet - Page 28

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AD5421CREZ-RL

Manufacturer Part Number
AD5421CREZ-RL
Description
16Bit 0.25% TUE. 0.01% Linearity DAC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5421CREZ-RL

Settling Time
50µs
Number Of Bits
16
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
625mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5421
OFFSET ADJUST REGISTER
The offset adjust register is a read/write register and is addressed as described in Table 11.
Table 20. Offset Adjust Register Bit Map
MSB
D15
Table 21. Offset Adjust Register Adjustment Range
Offset Adjust Register Data
65535
65534
32769
32768 (default)
32767
1
0
GAIN ADJUST REGISTER
The gain adjust register is a read/write register and is addressed as described in Table 11.
Table 22. Gain Adjust Register Bit Map
MSB
D15
Table 23. Gain Adjust Register Adjustment Range
Gain Adjust Register Data
65535 (default)
65534
32769
32768
32767
1
0
D14
D14
D13
D13
D12
D12
D11
D11
D10
D10
D9
D9
16-bit offset adjust data
16-bit gain adjust data
Rev. 0 | Page 28 of 32
D8
D8
D7
Digital Offset Adjustment (LSBs)
+32767
+32766
+1
0
−1
−32767
−32768
D7
Digital Gain Adjustment at Full-Scale Output (LSBs)
0
−1
−32767
−32768
−32769
−65534
−65535
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
LSB
D0
LSB
D0

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