AD5421CREZ-RL Analog Devices Inc, AD5421CREZ-RL Datasheet - Page 29

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AD5421CREZ-RL

Manufacturer Part Number
AD5421CREZ-RL
Description
16Bit 0.25% TUE. 0.01% Linearity DAC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5421CREZ-RL

Settling Time
50µs
Number Of Bits
16
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
625mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Transfer Function Equations with Offset and Gain Adjust
Values
When the offset adjust and gain adjust register values are taken
into account, the transfer equations can be expressed as follows.
For the 4 mA to 20 mA output range, the loop current can be
expressed as follows:
For the 3.8 mA to 21 mA output range, the loop current can be
expressed as follows:
I
+
I
+
LOOP
LOOP
4
3
8 .
mA
=
=
mA
⎜ ⎜
+
⎜ ⎜
16
17
+
2
2 .
⎜ ⎜
mA
2
16
16
16
⎜ ⎜
mA
17
2
2
mA
2
16
⎟ ⎟
16
16
2 .
2
⎟ ⎟
×
16
mA
×
⎟ ⎟
Gain
×
Gain
⎟ ⎟
(
Offset
×
×
(
×
Offset
D
D
32
,
768
32
,
768
)
)
Rev. 0 | Page 29 of 32
For the 3.2 mA to 24 mA output range, the loop current can be
expressed as follows:
where:
D is the decimal value of the DAC register.
Gain is the decimal value of the gain adjust register.
Offset is the decimal value of the offset adjust register.
Note that the offset adjust register cannot adjust the zero-scale
output value downward.
I
+
LOOP
3
2 .
=
mA
⎜ ⎜
+
20
8 .
2
⎜ ⎜
16
mA
20
2
8 .
2
16
⎟ ⎟
16
mA
×
Gain
⎟ ⎟
×
(
Offset
×
D
32
,
768
)
AD5421

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