AD5601BKSZ-REEL7 Analog Devices Inc, AD5601BKSZ-REEL7 Datasheet - Page 17

IC,D/A CONVERTER,SINGLE,8-BIT,CMOS,TSSOP,6PIN

AD5601BKSZ-REEL7

Manufacturer Part Number
AD5601BKSZ-REEL7
Description
IC,D/A CONVERTER,SINGLE,8-BIT,CMOS,TSSOP,6PIN
Manufacturer
Analog Devices Inc
Series
nanoDAC™r
Datasheet

Specifications of AD5601BKSZ-REEL7

Settling Time
6µs
Number Of Bits
8
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
500µW
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SC-70-6, SC-88, SOT-363
Number Of Channels
1
Resolution
8b
Conversion Rate
1.7MSPS
Interface Type
Serial (3-Wire, SPI, QSPI, Microwire)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±0.5LSB
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
6
Package Type
SC-70
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AD5601BKSZ-REEL7
AD5601BKSZ-REEL7TR

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Manufacturer
Quantity
Price
Part Number:
AD5601BKSZ-REEL7
Manufacturer:
STM
Quantity:
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Manufacturer:
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AD5601/AD5611/AD5621 to Blackfin® ADSP-BF53x
Interface
Figure 47 shows a serial interface between the AD5601/AD5611/
AD5621 and the Blackfin ADSP-BF53x microprocessor. The
ADSP-BF53x processor family incorporates two dual-channel
synchronous serial ports, SPORT1 and SPORT0, for serial and
multiprocessor communications. Using SPORT0 to connect to
the AD5601/AD5611/AD5621, the setup for the interface is as
follows: DT0PRI drives the SDIN pin of the AD5601/AD5611/
AD5621, while TSCLK0 drives the SCLK of the part. The SYNC
is driven from TFS0.
AD5601/AD5611/AD5621 to 80C51/80L51 Interface
Figure 48 shows a serial interface between the AD5601/
AD5611/AD5621 and the 80C51/80L51 microcontroller. The
setup for the interface is as follows: TxD of the 80C51/80L51
drives SCLK of the AD5601/AD5611/AD5621, while RxD
drives the serial data line of the part. The SYNC signal is again
derived from a bit programmable pin on the port. In this case,
Port Line P3.3 is used. When data is to be transmitted to the
AD5601/AD5611/AD5621, P3.3 is taken low. The 80C51/80L51
transmit data only in 8-bit bytes; therefore, only eight falling
clock edges occur in the transmit cycle. To load data to the
DAC, P3.3 is left low after the first eight bits are transmitted,
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 47. AD5601/AD5611/AD5621 to Blackfin ADSP-BF53x Interface
ADSP-BF53x*
TSCLK0
DT0PRI
TFS0
AD5601/AD5611/
AD5621*
SDIN
SCLK
SYNC
Rev. E | Page 17 of 20
and a second write cycle is initiated to transmit the second byte
of data. P3.3 is taken high following the completion of this
cycle. The 80C51/80L51 output the serial data LSB first. The
AD5601/AD5611/AD5621 require data with the MSB as the
first bit received. The 80C51/80L51 transmit routine should
take this into account.
AD5601/AD5611/AD5621 to MICROWIRE Interface
Figure 49 shows an interface between the AD5601/AD5611/
AD5621 and any MICROWIRE-compatible device. Serial data
is shifted out on the falling edge of the serial clock and is
clocked into the AD5601/AD5611/AD5621 on the rising edge
of the SK.
*ADDITIONAL PINS OMITTED FOR CLARITY
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 48. AD5601/AD5611/AD5621 to 80C51/80L51 Interface
Figure 49. AD5601/AD5611/AD5621 to MICROWIRE Interface
80C51/80L51*
MICROWIRE*
P3.3
RxD
TxD
SO
CS
SK
AD5601/AD5611/AD5621
AD5601/AD5611/
AD5621*
SYNC
SCLK
SDIN
AD5601/AD5611/
AD5621*
SYNC
SCLK
SDIN

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