AD7394ARZ Analog Devices Inc, AD7394ARZ Datasheet - Page 15

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AD7394ARZ

Manufacturer Part Number
AD7394ARZ
Description
X2, 12-Bit, +3V UPwr DAC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7394ARZ

Settling Time
60µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
1mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Number Of Channels
2
Resolution
12b
Conversion Rate
17KSPS
Interface Type
Serial (3-Wire)
Single Supply Voltage (typ)
3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
R-2R
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±2LSB
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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POWER SHUTDOWN (SHDN)
Maximum power savings can be achieved by using the power
shutdown control function. This hardware activated feature is
controlled by the active low input SHDN pin. This pin has a
Schmitt trigger input, which helps to desensitize it to slowly
changing inputs. By placing a logic low on this pin, the internal
consumption of the device is reduced to nano amp levels, guar-
anteed to 1.5 μA maximum over the operating temperature
range. When the AD7394 has been programmed into the power
shutdown state, the present DAC register data is maintained
as long as V
command, SHDN = 1, is given, the DAC voltage outputs return to
their previous values. It typically takes 80 microseconds for the
output voltage to fully stabilize. In the shutdown state the DAC
output amplifier exhibits an open circuit with a nominal output
resistance of 500 kΩ to ground. If the power shutdown feature is
not needed, tie the SHDN pin to the V
disabling this function.
UNIPOLAR OUTPUT OPERATION
This is the basic mode of operation for the AD7394. As shown
in Figure 23, the AD7394 has been designed to drive loads as
low as 5 kΩ in parallel with 100 pF. The code table for this
operation is shown in Table 7.
The circuit can be configured with an external reference plus
power supply, or powered from a single dedicated regulator or
reference depending on the application performance requirements.
DD
remains greater than 2.7 V. Once a wake-up
DD
voltage thereby
Rev. A | Page 15 of 16
Table 7. Unipolar Code Table
Hexadecimal Number
in DAC Register
FFF
801
800
7FF
000
EXT
REF
0.01µF
CONTROLLER
MICRO-
Figure 23. AD7394 Unipolar Output Operation
5
R
V
DIGITAL
REF
DGND
+2.7V TO +5.5V
Decimal Number
in DAC Register
4095
2049
2048
2047
0
V
DD
DAC A
DAC B
AGND
DIGITAL INTERFACE
CIRCUITRY OMITTED
FOR CLARITY.
75kΩ
75kΩ
Output
Voltage (V)
[V
2.4994
1.2506
1.2500
1.2494
0
REF
0.1µF
100pF
100pF
AD7394
= 2.5 V]
V
V
10µF
OUTA
OUTB

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