AD7400AYRWZ-RL Analog Devices Inc, AD7400AYRWZ-RL Datasheet - Page 3

• Manufacturer Part Number: AD7400AYRWZ-RL
• Description: Isolated Sigma-Delta Modulator ADC I.C.
• Manufacturer: Analog Devices Inc
• Type: Modulatorr

Specifications of AD7400AYRWZ-RL

• Resolution (bits): 14 b
• Data Interface: Serial
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sampling Rate (per Second): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPECIFICATIONS
V
T
unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
ANALOG INPUT
DYNAMIC SPECIFICATIONS
LOGIC OUTPUTS
POWER REQUIREMENTS
1
2
3
4
All voltages are relative to their respective ground.
See the Terminology section.
See Figure 15.
See Figure 16.
A
DD1
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Drift vs. Temperature
Offset Drift vs. V
Gain Error
Gain Error Drift vs. Temperature
Gain Error Drift vs. V
Dynamic Input Current
Input Capacitance
Signal-to-Noise and Distortion (SINAD) Ratio
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Effective Number of Bits (ENOB)
Isolation Transient Immunity
Output High Voltage, V
Output Low Voltage, V
V
V
I
I
Input Voltage Range
DD1
DD2
= −40°C to +125°C, except where specified; f
DD1
DD2
= 4.5 V to 5.5 V, V
3
4
2
2
DD1
DD1
2
DD2
OL
OH
2
= 3 V to 5.5 V, V
2
2
2
2
IN
+ = −200 mV to +200 mV, except where specified, and V
2
MCLK
Min
16
−250
70
68
73
72
11.5
11
25
V
4.5
3
= 10 MHz, tested with Sinc
DD2
− 0.1
Y Version
Rev. B | Page 3 of 20
Typ
±2
±4
±4
±50
1.5
120
23
110
±7
±9
±0.5
10
78
78
80
80
−84
−82
−86
−84
12.5
12.5
30
11
4.5
3
1
Max
±12
±16
±22
±0.9
±500
4
±1.5
±2
+250
±8
±10
0.4
5.5
5.5
13
6
3.5
3
Unit
Bits
LSB
LSB
LSB
LSB
μV
µV/°C
µV/V
mV
mV
µV/°C
µV/V
mV
µA
µA
µA
pF
dB
dB
dB
dB
dB
dB
dB
dB
Bits
Bits
kV/µs
V
V
V
V
mA
mA
mA
filter, 256 decimation rate, as defined by Verilog code,
Test Conditions/Comments
Filter output truncated to 16 bits
V
V
V
Guaranteed no missing codes to 16 bits
−40°C to +125°C
−40°C to +85°C
−40°C to +125°C
−40°C to +125°C
For specified performance, full range = ±320 mV
V
V
V
V
V
V
V
V
V
V
V
V
V
V
I
I
V
V
V
O
O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DD1
DD2
DD2
= −200 µA
= +200 µA
+ = ±200 mV, T
+ = ±250 mV, T
+ = ±250 mV, T
+ = 400 mV, V
+ = 500 mV, V
+ = V
+ = 35 Hz
+ = ±200 mV
+ = ±250 mV
+ = ±200 mV
+ = ±250 mV
+ = ±200 mV
+ = ±250 mV
+ = ±200 mV
+ = ±250 mV
+ = ±200 mV
+ = ±250 mV
= 5.5 V
= 5.5 V
= 3.3 V
IN
− = 0 V
IN
− = 0 V (single-ended);
IN
IN
A
A
A
− = 0 V
− = 0 V
= −40°C to +125°C
= −40°C to +85°C
= −40°C to +125°C
AD7400A