AD8193ACPZ-R7 Analog Devices Inc, AD8193ACPZ-R7 Datasheet - Page 4

IC,Telecom Switching Circuit,LLCC,32PIN,PLASTIC

AD8193ACPZ-R7

Manufacturer Part Number
AD8193ACPZ-R7
Description
IC,Telecom Switching Circuit,LLCC,32PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8193ACPZ-R7

Function
Switch
Circuit
1 x 2:1
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Current - Supply
50mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD8193
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
AVCC to AVEE
VTTI
VTTO
Internal Power Dissipation
High Speed Input Voltage
High Speed Differential
Source Select (S_SEL)
Storage Temperature Range
Operating Temperature
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Input Voltage
Range
Rating
3.7 V
AVCC + 0.6 V
AVCC + 0.6 V
1.2 W
AVCC − 1.4 V < V
2.0 V
AVEE − 0.3 V < V
−65°C to +125°C
−40°C to +85°C
150°C
IN
IN
< AVCC + 0.6 V
< AVCC + 0.6 V
Rev. 0 | Page 4 of 16
THERMAL RESISTANCE
θ
in a 4-layer JEDEC circuit board for surface-mount packages.
θ
with no airflow.
Table 3. Thermal Resistance
Package Type
32-Lead LFCSP
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8193 is limited by the associated rise in junction tempera-
ture. The maximum safe junction temperature for plastic
encapsulated devices is determined by the glass transition
temperature of the plastic, approximately 150°C. Temporarily
exceeding this limit may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure. To ensure proper operation,
it is necessary to observe the maximum power derating as
determined by the coefficients in Table 3.
ESD CAUTION
JA
JC
is specified for the worst-case conditions: a device soldered
is specified for the exposed pad soldered to the circuit board
θ
47
JA
θ
6.8
JC
Unit
°C/W

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