AD9255-105EBZ Analog Devices Inc, AD9255-105EBZ Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
AD9255-105EBZ
Manufacturer Part Number
AD9255-105EBZ
Description
14 Bit 105 Msps High SNR 1.8V ADC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9255BCPZRL7-80.pdf
(44 pages)
Specifications of AD9255-105EBZ
Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
105M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
371mW @ 125MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9255
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 9. Pin Function Descriptions (Interleaved Parallel LVDS Mode)
Pin No.
ADC Power Supplies
13, 20, 29
4, 5, 34, 36, 45
33
9, 10, 39, 40
0
ADC Analog
42
43
38
37
47
46
2
3
Digital Input
1
Digital Outputs
12
11
15
14
17
16
19
18
22
21
Mnemonic
DRVDD
AVDD
SVDD
DNC
AGND
VIN+
VIN−
VREF
SENSE
RBIAS
VCM
CLK+
CLK−
SYNC
D0/1+
D0/1−
D2/3+
D2/3−
D4/5+
D4/5−
D6/7+
D6/7−
D8/9+
D8/9−
Type
Supply
Supply
Supply
Ground
Input
Input
Input/output
Input
Input/output
Output
Input
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
NOTES
1. DNC = DO NOT CONNECT.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE
Figure 5. LFCSP Interleaved Parallel LVDS Pin Configuration (Top View)
PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PAD
MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
AVDD
AVDD
DCO+
SYNC
DCO–
D0/1+
CLK+
CLK–
D0/1–
OEB
DNC
DNC
10
11
12
1
2
3
4
5
6
7
8
9
Description
Digital Output Driver Supply (1.8 V Nominal).
Analog Power Supply (1.8 V Nominal).
SPI Input/Output Voltage.
Do Not Connect.
Analog Ground. The exposed thermal pad on the bottom of the package provides the
analog ground for the input. This exposed pad must be connected to ground for proper
operation.
Differential Analog Input Pin (+).
Differential Analog Input Pin (−).
Voltage Reference Input/Output.
Voltage Reference Mode Select. See Table 11 for details.
External Reference Bias Resistor.
Common-Mode Level Bias Output for Analog Inputs.
ADC Clock Input—True.
ADC Clock Input—Complement.
Digital Synchronization Pin. Slave mode only.
LVDS Output Data Bit 0/Bit 1 (LSB)—True.
LVDS Output Data Bit 0/Bit 1 (LSB)—Complement.
LVDS Output Data Bit 2/Bit 3—True.
LVDS Output Data Bit 2/Bit 3—Complement.
LVDS Output Data Bit 4/Bit 5—True.
LVDS Output Data Bit 4/Bit 5—Complement.
LVDS Output Data Bit 6/Bit 7—True.
LVDS Output Data Bit 6/Bit 7—Complement.
LVDS Output Data Bit 8/Bit 9 —True.
LVDS Output Data Bit 8/Bit 9—Complement.
PIN 1
INDICATOR
Rev. A | Page 13 of 44
INTERLEAVED
(Not to Scale)
AD9255
TOP VIEW
LVDS
36
35
34
33
32
31
30
29
28
27
26
25
AVDD
DITHER
AVDD
SVDD
CSB
SCLK/DFS
SDIO/DCS
DRVDD
OR+
OR–
D12/13+
D12/13–
AD9255