AD9268-125EBZ Analog Devices Inc, AD9268-125EBZ Datasheet - Page 14

• Manufacturer Part Number: AD9268-125EBZ
• Description: Dual 16 Bit 125 High SNR ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9268-125EBZ

• Design Resources: Powering AD9268 with ADP2114 for Increased Efficiency (CN0137)
• Number Of Adc's: 2
• Number Of Bits: 16
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Inputs Per Adc: 1 Differential
• Input Range: 1 ~ 2 Vpp
• Power (typ) @ Conditions: 750mW @ 125MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9268
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9268
Pin No.
33
34
35
36
38
39
40
41
42
43
4
5
6
7
8
9
11
12
13
14
15
16
17
18
20
21
22
24
23
SPI Control
45
44
46
ADC Configuration
47
48
Mnemonic
D7A
D8A
D9A
D10A
D11A
D12A
D13A
D14A
D15A (MSB)
ORA
D0B (LSB)
D1B
D2B
D3B
D4B
D5B
D6B
D7B
D8B
D9B
D10B
D11B
D12B
D13B
D14B
D15B (MSB)
ORB
DCOA
DCOB
SCLK/DFS
SDIO/DCS
CSB
OEB
PDWN
Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/Output
Input
Input
Input
Description
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A Overrange Output.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B Overrange Output
Channel A Data Clock Output.
Channel B Data Clock Output.
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.
SPI Chip Select (Active Low).
Output Enable Input (Active Low) in External Pin Mode.
Power-Down Input in External Pin Mode. In SPI mode, this input can be
configured as power-down or standby.
Rev. A | Page 14 of 44