AD9517-2A/PCBZ Analog Devices Inc, AD9517-2A/PCBZ Datasheet - Page 63
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AD9517-2A/PCBZ
Manufacturer Part Number
AD9517-2A/PCBZ
Description
12-Output Clock Generator With 2.8GHz VC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9517-2ABCPZ-RL7.pdf
(80 pages)
Specifications of AD9517-2A/PCBZ
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9517-2A
Primary Attributes
2 Inputs, 12 Outputs, 2.2GHz VCO
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reg.
Addr.
(Hex)
0x01B
0x01C
Bits
[4:0]
7
6
5
4
3
2
Name
REFMON
pin control
Disable
switchover
deglitch
Select REF2
Use REF_SEL pin
Automatic
reference
switchover
Stay on REF2
REF2 power-on
Description
Select the signal that is connected to the REFMON pin.
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Disable or enable the switchover deglitch circuit.
0: enable switchover deglitch circuit (default).
1: disable switchover deglitch circuit.
If Register 0x01C, Bit 5 = 0, select reference for PLL.
0: select REF1 (default).
1: select REF2.
If Register 0x01C, Bit 4 = 0 (manual), set method of PLL reference selection.
0: use Register 0x01C[6]. (default)
1: use REF_SEL pin.
Automatic or manual reference switchover. Single-ended reference mode must be selected by Register 0x01C, Bit 0 = 0.
0: manual reference switchover (default).
1: automatic reference switchover.
Stay on REF2 after switchover.
0: return to REF1 automatically when REF1 status is good again (default).
1: stay on REF2 after switchover. Do not automatically return to REF1.
When automatic reference switchover is disabled, this bit turns the REF2 power on.
0: REF2 power off (default).
1: REF2 power on.
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Level or
Dynamic
Signal
LVL
DYN
DYN
DYN
LVL
LVL
LVL
DYN
DYN
DYN
DYN
LVL
LVL
LVL
LVL
LVL
DYN
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
Rev. B | Page 63 of 80
Signal at REFMON Pin
Ground (dc) (default).
REF1 clock (differential reference when in differential mode).
REF2 clock (N/A in differential mode).
Selected reference to PLL (differential reference when in differential mode).
Unselected reference to PLL (not available in differential mode).
Status of selected reference (status of differential reference); active high.
Status of unselected reference (not available in differential mode); active high.
Status REF1 frequency (active high).
Status REF2 frequency (active high).
(Status REF1 frequency) AND (status REF2 frequency).
(DLD) AND (status of selected reference) AND (status of VCO).
Status of VCO frequency (active high).
Selected reference (low = REF1, high = REF2).
Digital lock detect (DLD); active low.
Holdover active (active high).
LD pin comparator output (active high).
VS (PLL supply).
REF1 clock (differential reference when in differential mode).
REF2 clock (not available in differential mode).
Selected reference to PLL (differential reference when in differential mode).
Unselected reference to PLL (not available when in differential mode).
Status of selected reference (status of differential reference); active low.
Status of unselected reference (not available in differential mode); active low.
Status of REF1 frequency (active low).
Status of REF2 frequency (active low).
(Status of REF1 frequency) AND (Status of REF2 frequency) .
(DLD) AND (Status of selected reference) AND (Status of VCO) .
Status of VCO frequency (active low).
Selected reference (low = REF2, high = REF1).
Digital lock detect (DLD); active low.
Holdover active (active low).
LD pin comparator output (active low).
AD9517-2