AD9601BCPZ-200 Analog Devices Inc, AD9601BCPZ-200 Datasheet - Page 21

• Manufacturer Part Number: AD9601BCPZ-200
• Description: IC,A/D CONVERTER,SINGLE,10-BIT,CMOS,LLCC,56PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9601BCPZ-200

• Number Of Bits: 10
• Sampling Rate (per Second): 200M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 291mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9601-250EBZ - BOARD EVALUATION AD9601-250
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HARDWARE INTERFACE
The pins described in Table 8 comprise the physical interface
between the user’s programming device and the serial port of
the AD9601. All serial pins are inputs, which is an open-drain
output and should be tied to an external pull-up or pull-down
resistor (suggested value of 10 kΩ).
This interface is flexible enough to be controlled by either
PROMS or PIC microcontrollers as well. This provides the user
with an alternate method to program the ADC other than a SPI
controller.
If the user chooses not to use the SPI interface, some pins serve
a dual function and are associated with a specific function when
strapped externally to AVDD or ground during device power-
on. The Configuration Without the SPI section describes the
strappable functions supported on the AD9601.
SCLK
SDIO
CSB
DON’T CARE
DON’T CARE
t
S
R/W
t
DS
W1
W0
t
DH
A12
A11
t
HI
Figure 44. Serial Port Interface Timing Diagram
A10
t
LO
A9
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t
CLK
A8
A7
CONFIGURATION WITHOUT THE SPI
In applications that do not interface to the SPI control registers,
the SPI SDIO/DCS and SPI SCLK/DFS pins can alternately
serve as standalone CMOS-compatible control pins. When the
device is powered up, it is assumed that the user intends to use
the pins as static control lines for the duty cycle stabilizer. In
this mode, the SPI CSB chip select should be connected to
ground, which disables the serial port interface.
Table 9. Mode Selection
Mnemonic
SPI SDIO/DCS
SPI SCLK/DFS
D5
D4
External
Voltage
AVDD
AGND
AVDD
AGND
D3
D2
Configuration
Duty cycle stabilizer enabled
Duty cycle stabilizer disabled
Twos complement enabled
Offset binary enabled
D1
D0
t
H
DON’T CARE
AD9601
DON’T CARE