AD9631AR Analog Devices Inc, AD9631AR Datasheet - Page 13

• Manufacturer Part Number: AD9631AR
• Description: Operational Amplifier (Op-Amp) IC
• Manufacturer: Analog Devices Inc

Specifications of AD9631AR

• Number Of Amplifiers: 1
• Bandwidth Max: 320MHz
• Slew Rate: 1300V/us
• Package/case: 8-SOIC
• Amplifier Type: Bias Current
• Leaded Process Compatible: No
• Offset Voltage: 3mV
• Rohs Status: RoHS non-compliant
• Number Of Circuits: 1
• -3db Bandwidth: 320MHz
• Current - Input Bias: 2µA
• Voltage - Input Offset: 3000µV
• Current - Supply: 17mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): 6 V ~ 12 V, ±3 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

THEORY OF OPERATION
General
The AD9631 and AD9632 are wide bandwidth, voltage feedback
amplifiers. Since their open-loop frequency response follows the
conventional 6 dB/octave roll-off, their gain bandwidth product
is basically constant. Increasing their closed-loop gain results in
a corresponding decrease in small signal bandwidth. This can
be observed by noting the bandwidth specification between the
AD9631 (gain of +1) and AD9632 (gain of +2). The AD9631/
AD9632 typically maintain 65 degrees of phase margin. This
high margin minimizes the effects of signal and noise peaking.
Feedback Resistor Choice
The value of the feedback resistor is critical for optimum perfor-
mance on the AD9631 (gain of +1) and less critical as the gain
increases. Therefore, this section is specifically targeted at the
AD9631.
At minimum stable gain (+1), the AD9631 provides optimum
dynamic performance with R
parasitic suppressor only against damped RF oscillations that
can occur due to lead (input, feedback) inductance and parasitic
capacitance. This value of R
wide bandwidth, low parasitic peaking, and fast settling time.
In fact, for the same reasons, a 100 W–130 W resistor should be
placed in series with the positive input for other AD9631 noninver-
ting and all AD9631 inverting configurations. The correct
connection is shown in Figures 3 and 4.
REV. C
V
V
IN
IN
Figure 3. Noninverting Operation
R
R
TERM
TERM
Figure 4. Inverting Operation
G = 1 +
G = –
100 –130
100 –130
R
R
R
R
R
R
R
IN
IN
G
F
G
F
G
R
G
F
F
AD9631/
AD9631/
provides the best combination of
AD9632
AD9632
= 140 W. This resistor acts as a
+V
–V
+V
–V
S
S
S
S
0.1 F
0.1 F
10 F
0.1 F
0.1 F
10 F
10 F
10 F
R
R
F
F
V
V
OUT
OUT
–13–
When the AD9631 is used in the transimpedance (I to V) mode,
such as in photodiode detection, the value of R
tance (C
will be in the kW range, and a shunt capacitor (C
be required to maintain good amplifier stability. The value of
C
settling time can be estimated as
where w
amplifier in rad/sec, and C
capacitance at the inverting input. Typically w
rad/sec (see TPC 15).
As an example, choosing R
to be 1.1 pF (Note: C
capacitance). The bandwidth of the amplifier can be estimated
using the C
For general voltage gain applications, the amplifier bandwidth
can be closely estimated as
This estimation loses accuracy for gains of +2/–1 or lower due
to the amplifier’s damping factor. For these “low gain” cases,
the bandwidth will actually extend beyond the calculated value
(see TPCs 13 and 25).
As a general rule, capacitor C
where NG is the noise gain (1 + R
voltage gain applications, this should be the case.
F
required to maintain optimal flatness (<1 dB peaking) and
O
I
) are usually known. Generally, the value of R
Figure 5. Transimpedance Configuration
is equal to the unity gain bandwidth product of the
F
calculated as
I
I
C
F
@
(
[
f
I
R R
(
3dB
2
includes both source and parasitic circuit
C
F
I
f
3
O
@
d
F
C R
I
G
2
= 10 kW and C
is the equivalent total input
I
@
AD9631
F
)
¥
will not be required if
F
2
(
1 R /R
R
C
–
F
1 6
+
AD9631/AD9632
R C
I
F
1
.
C
/R
O
F
£
)
F
/
F
G
4
NG
F
) of the circuit. For most
O
G
O
2
)
R
I
F
= 5 pF requires C
F
2
V
O
and diode capaci-
]
OUT
F
1
2
= 800
) across R
F
selected
10
F
6
will
F