AD9640ABCPZ-125 Analog Devices Inc, AD9640ABCPZ-125 Datasheet - Page 27

• Manufacturer Part Number: AD9640ABCPZ-125
• Description: 14Bit 125Msps Dual 1.8V PB Free ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9640ABCPZ-125

• Design Resources: Interfacing ADL5534 to AD9640 High Speed ADC (CN0049)
• Number Of Bits: 14
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 846mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9640.
The input range can be adjusted by varying the reference voltage
applied to the AD9640, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the next few sections. The Reference
Decoupling section describes the best practices PCB layout of
the reference.
Internal Reference Connection
A comparator within the AD9640 detects the potential at the
SENSE pin and configures the reference into four possible
modes, which are summarized in Table 14. If SENSE is grounded,
the reference amplifier switch is connected to the internal
resistor divider (see Figure 51), setting VREF to 1 V. Connecting
the SENSE pin to VREF switches the reference amplifier output
to the SENSE pin, completing the loop and providing a 0.5 V
reference output. If a resistor divider is connected external to
the chip, as shown in Figure 52, the switch again sets to the
SENSE pin. This puts the reference amplifier in a noninverting
mode with the VREF output defined as
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
Table 14. Reference Configuration Summary
Selected Mode
External Reference
Internal Fixed Reference
Programmable Reference
Internal Fixed Reference
VREF
1.0µF
=
0
Figure 51. Internal Reference Configuration
5 .
VIN+A/VIN+B
VIN–A/VIN–B
×
⎛ +
⎜
⎝
0.1µF
1
SENSE
VREF
R2
R1
⎞
⎟
⎠
SELECT
LOGIC
SENSE Voltage
AVDD
VREF
0.2 V to VREF
AGND to 0.2 V
AD9640
0.5V
CORE
ADC
Resulting VREF (V)
N/A
0.5
1.0
0
5 .
×
Rev. B | Page 27 of 52
⎛
⎜
⎝
1
+
R2
R1
⎞
⎟
⎠
(see Figure 52)
If the internal reference of the AD9640 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 53 shows
how the internal reference voltage is affected by loading.
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or improve thermal drift charac-
teristics. Figure 54 shows the typical drift characteristics of the
internal reference in 1 V mode.
–0.25
–0.50
–0.75
–1.00
–1.25
1.0µF
0
0
Figure 52. Programmable Reference Configuration
0.1µF
VREF
Figure 53. VREF Accuracy vs. Load
VIN+A/VIN+B
VIN–A/VIN–B
Resulting Differential Span (V p-p)
2 × External Reference
1.0
2 × VREF
2.0
0.5
SENSE
R2
R1
LOAD CURRENT (mA)
VREF = 1V
1.0
SELECT
LOGIC
VREF = 0.5V
AD9640
1.5
0.5V
CORE
ADC
AD9640
2
.0