AD9649BCPZRL7-65 Analog Devices Inc, AD9649BCPZRL7-65 Datasheet - Page 9
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AD9649BCPZRL7-65
Manufacturer Part Number
AD9649BCPZRL7-65
Description
14 Bit 65 Msps ADC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9649BCPZRL7-20.pdf
(32 pages)
Specifications of AD9649BCPZRL7-65
Number Of Bits
14
Sampling Rate (per Second)
65M
Data Interface
Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
87.5mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9649BCPZRL7-65
Manufacturer:
AD
Quantity:
3 200
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
AVDD to AGND
DRVDD to AGND
VIN+, VIN− to AGND
CLK+, CLK− to AGND
VREF to AGND
SENSE to AGND
VCM to AGND
RBIAS to AGND
CSB to AGND
SCLK/DFS to AGND
SDIO/PDWN to AGND
MODE/OR to AGND
D0 through D13 to AGND
DCO to AGND
Operating Temperature Range (Ambient)
Maximum Junction Temperature Under Bias
Storage Temperature Range (Ambient)
1
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
AGND refers to the analog ground of the customer’s PCB.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Rating
−0.3 V to +2.0 V
−0.3 V to +3.9 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−40°C to +85°C
150°C
−65°C to +150°C
Rev. 0 | Page 9 of 32
THERMAL CHARACTERISTICS
The exposed paddle is the only ground connection for the chip
and must be soldered to the analog ground plane of the user’s
PCB. Soldering the exposed paddle to the user’s board also
increases the reliability of the solder joints and maximizes the
thermal capability of the package.
Table 7. Thermal Resistance
Package
Type
32-Lead LFCSP
5 mm × 5 mm
1
2
3
4
Typical θ
plane. As shown in Table 7, airflow improves heat dissipation,
which reduces θ
package leads from metal traces, through holes, ground, and
power planes, reduces the θ
ESD CAUTION
Per JEDEC 51-7, plus JEDEC 51-5 2S2P test board.
Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
Per MIL-Std 883, Method 1012.1.
Per JEDEC JESD51-8 (still air).
JA
is specified for a 4-layer PCB with a solid ground
JA
Airflow
Velocity
(m/sec)
0
1.0
2.5
. In addition, metal in direct contact with the
θ
37.1
32.4
29.1
JA
JA
.
1, 2
θ
3.1
JC
1, 3
θ
20.7
JB
1, 4
Ψ
0.3
0.5
0.8
AD9649
JT
1,2
Unit
°C/W
°C/W
°C/W