ADC0801S040/DB NXP Semiconductors, ADC0801S040/DB Datasheet - Page 6

• Manufacturer Part Number: ADC0801S040/DB
• Description: ADC0801S040 Demo Board
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of ADC0801S040/DB

• Design Resources: ADC0801S Demo Brd Files
• Number Of Adc's: 1
• Number Of Bits: 8
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Input Range: 1.8 Vpp
• Power (typ) @ Conditions: 30mW @ 40MSPS
• Operating Temperature: -20°C ~ 75°C
• Utilized Ic / Part: ADC0801S040
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 6.
V
= 1.84 V; C
ADC0801S040_2
Product data sheet
Symbol
I
I
I
P
Inputs
Clock input CLK (Referenced to V
V
V
I
I
Z
C
Input SLEEP (Referenced to V
V
V
I
I
Analog input VI (Referenced to V
I
I
Z
C
Reference voltages for the resistor ladder; see
V
V
V
I
R
TC
V
V
DDA
DDD
DDO
IL
IH
IL
IH
IL
IH
ref
DDA
V
i
i
tot
IL
IH
IL
IH
RB
RT
ref(dif)
offset
i(a)(p-p)
i
i
lad
DD
Rlad
= V5 to V6 = 3.3 V; V
L
Characteristics
= 20 pF; T
Parameter
supply voltage difference V
analog supply current
digital supply current
output supply current
total power dissipation
LOW-level input voltage
HIGH-level input voltage V
LOW-level input current
HIGH-level input current V
input impedance
input capacitance
LOW-level input voltage
HIGH-level input voltage V
LOW-level input current
HIGH-level input current V
LOW-level input current
HIGH-level input current V
input impedance
input capacitance
voltage on pin RB
voltage on pin RT
differential reference
voltage
reference current
ladder resistance
ladder resistor
temperature coefficient
offset voltage
peak-to-peak analog
input voltage
amb
DDD
= 0 C to 70 C; typical values measured at T
…continued
= V3 to V4 = 3.3 V; V
SSD
SSA
SSD
); see
)
)
[1]
Conditions
V
f
C
V
V
V
f
f
V
V
V
f
f
V
V
BOTTOM
TOP
Table 8
clk
clk
clk
i
i
DDA
DDD
DDA
DDD
DDD
clk
clk
DDD
DDD
IL
IH
I
I
= 1 MHz
= 1 MHz
RT
RT
L
= V
= V
= 40 MHz; ramp input;
= 40 MHz
= 40 MHz
= 20 pF
= 0.3 V
= 0.7 V
= 0.3 V
= 0.7 V
= V
> 3.6 V
> 3.6 V
RB
RT
V
V
V
V
3.6 V
3.6 V
RB
DDA
DDD
DDD
DDO
Rev. 02 — 18 August 2008
Table 7
DDO
DDD
DDD
DDD
DDD
= V
= V20 to V11 = 3.3 V; V
DDO
= 3.3 V
[2]
[2]
[3]
amb
Min
-
-
-
-
0
0.6 V
0.7 V
-
-
-
0
0.6 V
0.7 V
-
-
-
-
-
1.1
2.7
1.5
-
-
-
-
-
1.4
0.2
0.2
1
1
= 25 C unless otherwise specified.
SSA
DDD
DDD
DDD
DDD
, V
SSD
Single 8 bits ADC, up to 40 MHz
Typ
-
-
4
5
1
30
-
-
-
0
-
4
3
-
-
-
-
-
0
9
20
2
1.2
3.3
2.1
0.95
2.2
4092
170
170
1.76
and V
ADC0801S040
SSO
shorted together; V
Max
+0.2
+2.25
6
8
2
53
0.3 V
V
V
+1
5
-
-
0.3 V
V
V
-
+1
-
-
-
-
-
V
2.7
-
-
-
-
-
2.4
DDD
DDD
DDD
DDD
DDA
© NXP B.V. 2008. All rights reserved.
DDD
DDD
Unit
V
V
mA
mA
mA
mW
V
V
V
k
pF
V
V
V
k
pF
V
V
V
mA
k
mV
mV
V
m /K
A
A
A
A
A
A
i(a)(p-p)
6 of 19