ADE7166ASTZF16-RL Analog Devices Inc, ADE7166ASTZF16-RL Datasheet - Page 117

• Manufacturer Part Number: ADE7166ASTZF16-RL
• Description: IC,Power Metering,QFP,64PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7166ASTZF16-RL

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 116. Timer 0 High Byte SFR (TH0, Address 0x8C)
Bit
[7:0]
Table 117. Timer 0 Low Byte SFR (TL0, Address 0x8A)
Bit
[7:0]
Table 118. Timer 1 High Byte SFR (TH1, Address 0x8D)
Bit
[7:0]
Table 119. Timer 1 Low Byte SFR (TL1, Address 0x8B)
Bit
[7:0]
Table 120. Timer 2 High Byte SFR (TH2, Address 0xCD)
Bit
[7:0]
Table 121. Timer 2 Low Byte SFR (TL2, Address 0xCC)
Bit
[7:0]
Table 122. Timer 2 Reload/Capture High Byte SFR
(RCAP2H, Address 0xCB)
Bit
[7:0]
Table 123. Timer 2 Reload/Capture Low Byte SFR (RCAP2L,
Address 0xCA)
Bit
[7:0]
TIMER 0 AND TIMER 1
Timer 0 High/Low and Timer 1 High/Low Data SFRs
Each timer consists of two 8-bit SFRs. They are Timer 0 high
byte (TH0, Address 0x8C), Timer 0 low byte (TL0, Address 0x8A),
Timer 1 high byte (TH1, Address 0x8D), and Timer 1 low byte
(TL1, Address 0x8B). These SFRs can be used as independent
registers or combined into a single 16-bit register, depending on
the timer mode configuration (see Table 116 to Table 119).
Timer/Counter 0 and Timer/Counter 1 Operating Modes
This section describes the operating modes for Timer/Counter 0
and Timer/Counter 1. Unless otherwise noted, these modes of
operation are the same for both Timer 0 and Timer 1.
Mnemonic
TL2
Mnemonic
TH0
Mnemonic
TL0
Mnemonic
TH1
Mnemonic
TL1
Mnemonic
TH2
Mnemonic
TH2
Mnemonic
TL2
Default
0
Default
0
Default
0
Default
0
Default
0
Default
0
Default
0
Default
0
Description
Timer 0 data high byte.
Description
Timer 0 data low byte.
Description
Timer 1 data high byte.
Description
Timer 1 data low byte.
Description
Timer 2 data high byte.
Description
Timer 2 data low byte.
Description
Timer 2 reload/
capture high byte.
Description
Timer 2 reload/
capture low byte.
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Rev. B | Page 117 of 152
Mode 0 (13-Bit Timer/Counter)
Mode 0 configures an 8-bit timer/counter. Figure 97 shows
Mode 0 operation. Note that the divide-by-12 prescaler is not
present on the single-cycle core.
In this mode, the timer register is configured as a 13-bit register.
As the count rolls over from all 1s to all 0s, it sets the timer
overflow flag, TF0 (Address 0x88[5]). TF0 can then be used to
request an interrupt. The counted input is enabled to the timer
when TR0 = 1 and either Gate0 to 0 or INT0 = 1. Setting Gate0
to 1 allows the timer to be controlled by the external input INT0
to facilitate pulse width measurements. TR0 is a control bit in
the Timer/Counter 0 and Timer/Counter 1 control SFR
(TCON, Address 0x88); the Gate0/Gate1 bits are in
Timer/Counter 0 and Timer/Counter 1 mode SFR (TMOD,
Address 0x89). The 13-bit register consists of all eight bits of
Timer 0 high byte SFR (TH0, Address 0x8C) and the lower five
bits of Timer 0 low byte SFR (TL0, Address 0x8A). The upper
three bits of TL0 SFR are indeterminate and should be ignored.
Setting the run flag (TR0) does not clear the registers.
Mode 1 (16-Bit Timer/Counter)
Mode 1 is the same as Mode 0 except that the Mode 1 timer
register runs with all 16 bits. Mode 1 is shown in Figure 98.
f
P0.6/T0
P0.6/T0
f
CORE
GATE
CORE
GATE
I
INT
NT0
0
TR0
TR0
Figure 97. Timer/Counter 0, Mode 0
Figure 98. Timer/Counter 0, Mode 1
C/T0 = 0
C/T0 = 1
C/T0 = 1
C/T0 = 0
CONTROL
CONTROL
(8 BITS)
(5 BITS)
TL0
TL0
(8 BITS)
(8 BITS)
TH0
TH0
TF0
TF0
INTERRUPT
INTERRUPT