ADL5561ACPZ-R7 Analog Devices Inc, ADL5561ACPZ-R7 Datasheet - Page 19

Low Distortion 3V 41mA Diff Amp

ADL5561ACPZ-R7

Manufacturer Part Number
ADL5561ACPZ-R7
Description
Low Distortion 3V 41mA Diff Amp
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADL5561ACPZ-R7

Amplifier Type
RF/IF Differential
Number Of Circuits
1
Output Type
Differential
Slew Rate
9800 V/µs
-3db Bandwidth
2.9GHz
Current - Input Bias
3µA
Current - Supply
40mA
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-VFQFN, 16-CSP, Exposed Pad
Voltage - Supply
3 V ~ 3.6 V
Frequency
2.9GHz
Rf Type
General Purpose
Gain
15.5dB
Noise Figure
8dB
P1db
19dBm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Test Frequency
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADL5561ACPZ-R7TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADL5561ACPZ-R7
Manufacturer:
MICREL
Quantity:
1 000
Part Number:
ADL5561ACPZ-R7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
SOLDERING INFORMATION
On the underside of the chip scale package, there is an exposed
compressed paddle. This paddle is internally connected to the
ground of the chip. Solder the paddle to the low impedance
ground plane on the PCB to ensure the specified electrical
performance and to provide thermal relief. To further reduce
thermal impedance, the ground planes on all layers under the
paddle should be stitched together with vias.
EVALUATION BOARD
Figure 43 shows the schematic of the ADL5561 evaluation board.
The board is powered by a single supply in the 3 V to 3.6 V range.
The power supply is decoupled by 10 μF and 0.1 μF capacitors
Table 14 details the various configuration options of the evaluation
board. Figure 44 and Figure 45 show the component and circuit
layouts of the evaluation board.
Table 14. Evaluation Board Configuration Options
Component
VPOS, GND
C3, C4, C5,
C6, C7, C11
J1, R1, R2, R3,
R4, R5, R6, C1,
C2, C12, T1
J3, R7, R8, R9,
R10, R11, C9,
C10, C13, T2
ENBL, P1, C8
J1
0.1µF
Description
Ground and Supply Vector Pins.
Power Supply Decoupling. The supply decoupling consists of a 10 μF capacitor (C3)
to ground. C4 to C7 are bypass capacitors. C11 ac couples VREF to ground.
Input Interface. The SMA labeled J1 is the input. T1 is a 1-to-1 impedance ratio
balun to transform a single-ended input into a balanced differential signal. C1 and
C2 provide ac-coupling. C12 is a bypass capacitor. R1 and R2 provide a differential
50 Ω input termination. R3 to R6 are used to select the input for the pin-strappable
gain. Maximum gain: R3, R4, R5, R6 = 0 Ω; R1, R2 = 40.2 Ω. Middle gain: R5, R6 = 0 Ω;
R3, R4 = open; R1, R2 = 33 Ω. Minimum gain: R3, R4 = 0 Ω; R5, R6 = open; R1, R2 = 29 Ω.
Output Interface. The SMA labeled J3 is the output. T2 is a 1-to-1 impedance
ratio balun to transform a balanced differential signal to a single-ended signal.
C13 is a bypass capacitor. R7, R8, R9, and R10 are provided for generic placement
of matching components. The evaluation board is configured to provide a 200 Ω
to 50 Ω impedance transformation with an insertion loss of 17 dB. C9 and C10
provide ac-coupling.
Device Enable. C8 is a bypass capacitor. When the P1 jumper is set toward the VPOS
label, the ENBL pin is connected to the supply, enabling the device. In the opposite
direction, toward the GND label, the ENBL pin is grounded, putting the device in
power-down mode.
C12
T1
40.2Ω
40.2Ω
R1
R2
VPOS
0.01µF
0.01µF
C1
C2
0Ω
0Ω
0Ω
0Ω
R5
R3
R4
R6
C3
10µF
1
2
3
4
C4
0.1µF
VIP2
VIP1
VIN1
VIN2
GND
VCC
16
5
Figure 43. Evaluation Board Schematic
ADL5561
GND GND
VCC
C5
0.1µF
15
6
VCC
Rev. B | Page 19 of 24
14
7
C6
0.1µF
VOCM
GND
ENBL
VCC
13
VOP
VON
8
C7
0.1µF
12
11
10
9
To realize the minimum gain (6 dB into a 200 Ω load), Input 1
(VIN1 and VIP1) must be used by installing 0 Ω resistors at R3
and R4, leaving R5 and R6 open. R1 and R2 must be 33 Ω for a
50 Ω input impedance.
Likewise, driving Input 2 (VIN2 and VIP2) realizes the middle
gain (12 dB into a 200 Ω load) by installing 0 Ω at R5 and R6
and leaving R3 and R4 open. R1 and R2 must be 29 Ω for a
50 Ω input impedance.
For the maximum gain (15.5 dB into a 200 Ω load), both inputs
are driven by installing 0 Ω resistors at R3, R4, R5, and R6. R1
and R2 must be 40.2 Ω for a 50 Ω input impedance.
The balanced input and output interfaces are converted to
single ended with a pair of baluns (M/A-COM ETC1-1-13).
The balun at the input, T1, provides a 50 Ω single-ended-to-
differential transformation. The output balun, T2, and the
matching components are configured to provide a 200 Ω to 50 Ω
impedance transformation with an insertion loss of about 17 dB.
0.01µF
0.01µF
C10
C9
C11
0.1µF
VPOS
GND
AGND
P1
84.5Ω
84.5Ω
ENBL
R7
R8
J2
34.8Ω
34.8Ω
C8
0.1µF
R10
R9
0.1µF
Default Condition
VPOS, GND = installed
C3 = 10 μF (Size D),
C4, C5, C6, C7, C11 = 0.1 μF (Size 0402)
J1 = installed,
R1, R2 = 40.2 Ω (Size 0402),
R3, R4, R5, R6 = 0 Ω (Size 0402),
C1, C2 = 0.01 μF (Size 0402),
C12 = 0.1 μF (Size 0402)
T1 = ETC1-1-13 (M/A-COM)
J3 = installed,
R7, R8 = 84.5 Ω (Size 0402),
R9, R10 = 34.8 Ω (Size 0402),
R11 = open (Size 0402),
C9, C10 = 0.01 μF (Size 0402),
C13 = 0.1 μF (Size 0402)
T2 = ETC1-1-13 (M/A-COM)
ENBL, P1 = installed,
C8 = 0.1 μF (Size 0402)
C13
T2
OPEN
R11
J3
ADL5561

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