ADM8696ANZ Analog Devices Inc, ADM8696ANZ Datasheet - Page 5

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ADM8696ANZ

Manufacturer Part Number
ADM8696ANZ
Description
IMPROVED ADM696 I.C.
Manufacturer
Analog Devices Inc
Type
Battery Backup Circuitr
Datasheet

Specifications of ADM8696ANZ

Number Of Voltages Monitored
1
Output
Push-Pull, Push-Pull
Reset
Active High/Active Low
Reset Timeout
35 ms Minimum
Voltage - Threshold
1.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. A
CIRCUIT INFORMATION
Battery Switchover Section (ADM8696)
The battery switchover circuit is designed to switch over to
battery backup in the event of a power failure. When LL
is below the reset threshold and V
V
During normal operation, with V
internally switched to V
switch. This switch has a typical on resistance of 0.7
supply up to 100 mA at the V
used to drive a RAM memory bank which may require instanta-
neous currents of greater than 100 mA. If this is the case, then
a bypass capacitor should be connected to V
will provide the peak current transients to the RAM. A capaci-
tance value of 0.1 F or greater may be used.
If the continuous output current requirement at V
100 mA or if a lower V
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output can directly
drive the base of the external transistor.
A 7
ing battery backup. This MOSFET has very low input-to-out-
put differential (dropout voltage) at the low current levels
required for battery backup of CMOS RAM or other low power
CMOS circuitry. The supply current in battery backup is typi-
cally 0.4 A.
The ADM8696 operates with battery voltages from 2.0 V to
V
or the farad-size double layer capacitors, can also be used for
short-term memory backup. A small charging current of typi-
cally 10 nA (0.1 A max) flows out of the V
current is useful for maintaining rechargeable batteries in a fully
charged condition. This extends the life of the backup battery
by compensating for its self-discharge current. Also note that
this current poses no problem when lithium batteries are used
for backup since the maximum charging current (0.1 A) is safe
for even the smallest lithium cells.
If the battery switchover section is not used, V
connected to GND and V
V
BATT
CC
BATT
V
CC
–0.3 V). High value capacitors, either standard electrolytic
MOSFET switch connects the V
is switched to V
Figure 1. Battery Switchover Schematic
700
mV
GATE DRIVE
100
mV
CC
OUT
OUT
–V
OUT
.
via an internal PMOS transistor
OUT
INTERNAL
SHUTDOWN SIGNAL
WHEN
V
BATT
OUT
should be connected to V
voltage differential is desired,
CC
> (V
terminal. V
CC
CC
higher than V
+ 0.7V)
is below V
BATT
BATT
OUT
input to V
OUT
BATT
V
BATT ON
(ADM8691, ADM8693,
ADM8695, ADM8696)
OUT
. The capacitor
terminal. This
BATT
is normally
BATT
OUT
should be
, then
, V
exceeds
OUT
and can
CC
CC
.
IN
dur-
is
–5–
Low Line RESET OUTPUT
RESET is an active low output that provides a RESET signal to
the microprocessor whenever the Low Line Input (LL
low 1.3 V. The LL
power supply voltage. An internal timer holds RESET low for
50 ms after the voltage on LL
tended as a power-on RESET signal for the processor. It allows
time for the power supply and microprocessor to stabilize. On
power-down, the RESET output remains low, with V
as 1 V. This ensures that the microprocessor is held in a stable
shutdown condition.
The LL
for enhanced noise immunity.
In addition to RESET, an active high RESET output is also
available. This is the complement of RESET and is useful for
processors requiring an active high RESET.
Watchdog Timer RESET
The watchdog timer circuit monitors the activity of the micro-
processor in order to check that it is not stalled in an indefinite
loop. An output line on the processor is used to toggle the
Watchdog Input (WDI) line. If this line is not toggled within
the selected timeout period, a RESET pulse is generated. The
ADM8696/ADM8697 may be configured for either a fixed
“short” 100 ms or a “long” 1.6 second timeout period or for an
adjustable timeout period. If the “short” period is selected,
some systems may be unable to service the watchdog timer im-
mediately after a reset, so a “long” timeout is automatically ini-
tiated directly after a reset is issued. The watchdog timer is
restarted at the end of Reset, whether the Reset was caused by
lack of activity on WDI or by LL
threshold.
The normal (short) timeout period becomes effective following
the first transition of WDI after RESET has gone inactive. The
watchdog timeout period restarts with each transition on the
WDI pin. To ensure that the watchdog timer does not time out,
either a high-to-low or low-to-high transition on the WDI pin
must occur at or less than the minimum timeout period. If WDI
remains permanently either high or low, reset pulses will be is-
sued after each timeout period (1.6 s). The watchdog monitor
can be deactivated by floating the Watchdog Input (WDI) or by
connecting it to midsupply.
LOW LINE
RESET
LL
IN
IN
t
V1 = RESET VOLTAGE THRESHOLD LOW
V2 = RESET VOLTAGE THRESHOLD HIGH
HYSTERESIS = V2–V1
comparator has approximately 12 mV of hysteresis
1
= RESET TIME
Figure 2. Power-Fail Reset Timing
V2
IN
t
1
input is normally used to monitor the
ADM8696/ADM8697
IN
V1
rises above 1.3 V. This is in-
IN
falling below the reset
V2
t
1
CC
IN
) is be-
as low
V1

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