ADSP-21061KSZ-133 Analog Devices Inc, ADSP-21061KSZ-133 Datasheet - Page 19
![ADSP-21061 1MBIT, 33MHz, 5v SHARC](/photos/6/71/67190/sp-240-2_sml.jpg)
ADSP-21061KSZ-133
Manufacturer Part Number
ADSP-21061KSZ-133
Description
ADSP-21061 1MBIT, 33MHz, 5v SHARC
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr
Datasheet
1.ADSP-21061LKSZ-160.pdf
(56 pages)
Specifications of ADSP-21061KSZ-133
Interface
Synchronous Serial Port (SSP)
Clock Rate
33MHz
Non-volatile Memory
External
On-chip Ram
128kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
240-MQFP, 240-PQFP
Package
240MQFP
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
33 MHz
Ram Size
128 KB
Device Million Instructions Per Second
33 MIPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-21061KSZ-133
Manufacturer:
Analog Devices Inc
Quantity:
10 000
INTERNAL POWER DISSIPATION (3.3 V)
These specifications apply to the internal power portion of V
only. See the Power Dissipation section of this data sheet for cal-
culation of external supply current and total supply current. For
To estimate power consumption for a specific application, use
the following equation where % is the amount of time your pro-
gram spends in that state:
%PEAK I
I
1
2
3
4
5
Operation
Instruction Type
Instruction Fetch
Core memory Access
Internal Memory DMA
DDIDLE
Parameter
I
I
I
I
I
The test program used to measure I
I
IDDINLOW
Idle denotes ADSP-21061L state during execution of IDLE instruction.
Idle16 denotes ADSP-21061L state during execution of IDLE16 instruction.
DDINPEAK
DDINHIGH
DDINLOW
DDIDLE
DDIDLE
measurements made using typical applications are less than specified.
DDINHIGH
= power consumption
Supply Current (Idle)
Supply Current (Idle)
is a composite average based on a range of low activity code.
Supply Current (Internal)
DDINPEAK
is a composite average based on a range of high activity code. I
Supply Current (Internal)
Supply Current (Internal)
+ %HIGH I
4
5
DDINHIGH
DDINPEAK
3
1
2
+ %LOW I
represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal power
DDINLOW
Peak Activity (I
Multifunction
Cache
2 per Cycle (DM and PM)
1 per Cycle
Test Conditions
t
t
t
t
t
t
V
V
CK
CK
CK
CK
CK
CK
DD
DD
Rev. C | Page 19 of 56 | July 2007
+ %IDLE
= 25 ns, V
= 22.5 ns, V
= 25 ns, V
= 22.5 ns, V
= 25 ns, V
= 22.5 ns, V
= Max
= Max
DDINLOW
DD
DD
DD
DD
DD
DD
DD
= Max
= Max
= Max
DDINPEAK
is a composite average based on a range of low activity code.
= Max
= Max
= Max
)
a complete discussion of the code used to measure power dissi-
pation, see the technical note “SHARC Power Dissipation
Measurements.”
Specifications are based on the operating scenarios:
High Activity (I
Multifunction
Internal Memory
1 per Cycle (DM)
1 per 2 Cycles
Max
480
535
380
425
220
245
180
50
ADSP-21061/ADSP-21061L
DDINHIGH
)
Low Activity (I
Single Function
Internal Memory
None
1 per 2 Cycles
Unit
mA
mA
mA
mA
mA
mA
mA
mA
DDINLOW
)