ADSP-BF512KSWZ-3 Analog Devices Inc, ADSP-BF512KSWZ-3 Datasheet - Page 49

• Manufacturer Part Number: ADSP-BF512KSWZ-3
• Description: Low-Power Blackfin Processor
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF512KSWZ-3

• Interface: I²C, PPI, SPI, SPORT, UART/USART
• Clock Rate: 300MHz
• Non-volatile Memory: External
• On-chip Ram: 116kB
• Voltage - I/o: 1.8V, 2.5V, 3.3V
• Voltage - Core: 1.30V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 176-LQFP Exposed Pad, 176-eLQFP, 176-HLQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

JTAG Test And Emulation Port Timing
Table 49
Table 49. JTAG Port Timing
1
2
3
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = DATA15–0, SCL, SDA, TFS0, TSCLK0, RSCLK0, RFS0, DR0PRI, DR0SEC, PF15–0, PG15–0, PH7–0, MDIO, TD1, TMS, RESET, NMI, BMODE2–0.
50 MHz Maximum
System Outputs = DATA15–0, ADDR19–1, ABE1–0, ARE, AWE, AMS1–0, SRAS, SCAS, SWE, SCKE, CLKOUT, SA10, SMS, SCL, SDA, TSCLK0, TFS0, RFS0, RSCLK0,
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
DT0PRI, DT0SEC, PF15–0, PG15–0, PH7–0, MDC, MDIO.
1
1
3
ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F
and
OUTPUTS
SYSTEM
SYSTEM
INPUTS
Figure 37
TCK
TMS
TDO
TDI
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
describe JTAG port operations.
2
(measured in TCK cycles)
t
DSYS
t
DTDO
t
TCK
Rev. B | Page 49 of 68 | January 2011
t
SSYS
t
STAP
Figure 37. JTAG Port Timing
t
HTAP
t
HSYS
Min
20
4
4
4
5
4
0
Max
10
13
Unit
ns
ns
ns
ns
ns
TCK
ns
ns