ADUM3160BRWZ-RL Analog Devices Inc, ADUM3160BRWZ-RL Datasheet - Page 8

• Manufacturer Part Number: ADUM3160BRWZ-RL
• Description: 2.5kVFull/Low Speed USB Digital Isolator
• Manufacturer: Analog Devices Inc
• Series: iCoupler®r

Specifications of ADUM3160BRWZ-RL

• Operating Temperature: -40°C ~ 105°C
• Inputs - Side 1/side 2: 2/2
• Number Of Channels: 4
• Isolation Rating: 2500Vrms
• Voltage - Supply: 3 V ~ 5.5 V
• Data Rate: 12Mbps
• Propagation Delay: 70ns
• Output Type: Logic
• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuM3160
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 9. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic Direction Description
V
GND
V
PDEN
SPU
UD−
UD+
GND
GND
DD+
DD−
PIN
SPD
V
GND
V
BUS1
DD1
DD2
BUS2
1
1
2
2
Power
Return
Power
Input
Input
I/O
I/O
Return
Return
I/O
I/O
Input
Input
Power
Return
Power
Input Power Supply for Side 1. Where the isolator is powered by the USB bus voltage (4.5 V to 5.5 V),
connect the V
connect V
Ground 1. Ground reference for Isolator Side 1.
Input Power Supply for Side 1. Where the isolator is powered by the USB bus voltage (4.5 V to 5.5 V), the
V
PDEN and SPU, should be tied to this pin. Where the isolator is powered from a 3.3 V power supply,
connect V
Pull-Down Enable. This pin is read when exiting reset. This pin must be connected to V
operation. When connected to GND
disconnected, allowing buffer impedance measurements.
Speed Select Upstream Buffer. Active high logic input. Selects the full speed slew rate and timing and
the logic conventions when SPU is high and low speed slew rate, timing, and logic conventions when
SPU is tied low. This input must be set high via connection to V
must match Pin 13.
Upstream D−.
Upstream D+.
Ground 1. Ground reference for Isolator Side 1.
Ground 2. Ground reference for Isolator Side 2.
Downstream D+.
Downstream D−.
Upstream Pull-Up Enable. SPD controls the power connection to the pull-up for the upstream port. It
can be tied to V
requiring delayed enumeration.
Speed Select Downstream Buffer. Active high logic input. Selects the full speed slew rate and timing and
the logic conventions when SPU is high and low speed slew rate, timing, and logic conventions when
SPD is tied low. This input must be set high via connection to V
must match Pin 5.
Input Power Supply for Side 2. Where the isolator is powered by the USB bus voltage (4.5 V to 5.5 V), the
V
SPD, can be tied to this pin. Where the isolator is powered from a 3.3 V power supply, connect V
V
Ground 2. Ground reference for Isolator Side 2.
Input Power Supply for Side 2. Where the isolator is powered by the USB bus voltage (4.5 V to 5.5 V),
connect V
V
DD1
DD2
DD2
BUS2
pin should be used for a bypass capacitor to GND
pin should be used for a bypass capacitor to GND
and to the external 3.3 V power supply. Bypass to GND
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING
to V
BOTH TO GND
CONNECTED, AND CONNECTING BOTH TO GND
DD2
BUS1
BUS1
BUS2
and to the external 3.0 V to 3.3 V power supply. A bypass to GND
to V
to V
to the USB power bus. Where the isolator is powered from a 3.3 V power supply, connect
BUS1
DD2
1
pin to the USB power bus. Where the isolator is powered from a 3.3 V power supply,
DD1
DD1
IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
for operation on power-up or tied to an external control signal for an application
GND
GND
V
PDEN
V
BUS1
SPU
UD–
UD+
and to the external 3.3 V power supply. A bypass to GND
and to the external 3.3 V power supply. Bypass to GND
DD1
1
1
*
*
Figure 3. Pin Configuration
1
2
3
4
5
6
7
8
Rev. A | Page 8 of 16
ADuM3160
(Not to Scale)
TOP VIEW
1
while exiting from reset, the downstream pull-down resistors are
16
15
14
13
12
11
10
9
V
GND
V
SPD
PIN
DD–
DD+
GND
2
BUS2
DD2
IS RECOMMENDED.
2
2
*
*
1
2
. Signal lines that may require pull-up, such as
. Signal lines that may require pull-up, such as
2
is required.
DD1
DD2
or set low via connection to GND
or low via connection to GND
1
is required.
2
1
is required.
is required.
DD1
for standard
BUS2
2
, and
1
to
and