CS2300CP-DZZ Cirrus Logic Inc, CS2300CP-DZZ Datasheet - Page 17

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CS2300CP-DZZ

Manufacturer Part Number
CS2300CP-DZZ
Description
IC General Purpose PLL LCO
Manufacturer
Cirrus Logic Inc
Type
Fanout Distribution, Fractional N Synthesizerr
Datasheets

Specifications of CS2300CP-DZZ

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
75MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Frequency-max
75MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1494 - BOARD EVAL GEN PURPOSE PLL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS843F1
5.3.2
5.3.3
in either a high resolution (12.20) or high multiplication (20.12) format selectable by the LFRatioCfg bit,
with 20.12 being the default.
The R
tion with the remaining 20 LSBs representing the fractional binary portion. The maximum multiplication
factor is approximately 4096 with a resolution of 0.954 PPM in this configuration. See
User Defined Ratio” on page 29
The R
portion with the remaining 12 LSBs representing the fractional binary portion. In this configuration, the
maximum multiplication factor is approximately 1,048,575 with a resolution of 244 PPM. It is recommend-
ed that the 12.20 High-Resolution format be utilized whenever the desired ratio is less than 4096 since
the output frequency accuracy of the PLL is directly proportional to the accuracy of the timing reference
clock and the resolution of the R
Ratio Modifier (R-Mod)
The Ratio Modifier is used to internally multiply/divide the R
mains unchanged). The available options for R
The R-Mod value selected by RModSel[2:0] is always used in the calculation for the Effective Ratio
(R
its default value of ‘000’, which corresponds to an R-Mod value of 1, thereby effectively disabling the ratio
modifier.
Effective Ratio (R
The Effective Ratio (R
previously described. R
R
Referenced Control
Ratio......................................“Ratio (Address 06h - 09h)” on page 26
LFRatioCfg
Referenced Control
Ratio......................................“Ratio (Address 06h - 09h)” on page 26
RModSel[2:0]
EFF
EFF
= R
),
UD
UD
see “Effective Ratio (REFF)” on page
UD
for high resolution (12.20) format is encoded with 12 MSBs representing the integer binary por-
for high multiplication (20.12) format is encoded with 20 MSBs representing the integer binary
............................“Low-Frequency Ratio Configuration (LFRatioCfg)” on page 28
........................“R-Mod Selection (RModSel[2:0])” section on page 25
R
MOD
RModSel[2:0]
EFF
EFF
Register Location
Register Location
EFF
000
001
010
100
101
011
110
111
) is an internal calculation comprised of R
)
is calculated as follows:
UD
for more information.
.
Table 1. Ratio Modifier
17. If R-Mod is not desired, RModSel[2:0] should be left at
MOD
are summarized in
Ratio Modifier
UD
0.0625
0.125
0.25
0.5
1
2
4
8
(the Ratio stored in the register space re-
UD
and the appropriate modifiers, as
Table 1 on page
CS2300-CP
17.
“Calculating the
17

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