CS2300CP-DZZ Cirrus Logic Inc, CS2300CP-DZZ Datasheet - Page 22

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CS2300CP-DZZ

Manufacturer Part Number
CS2300CP-DZZ
Description
IC General Purpose PLL LCO
Manufacturer
Cirrus Logic Inc
Type
Fanout Distribution, Fractional N Synthesizerr
Datasheets

Specifications of CS2300CP-DZZ

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
75MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Frequency-max
75MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1494 - BOARD EVAL GEN PURPOSE PLL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
22
SDA
SCL
SDA
SCL
START
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in
dition. The following pseudocode illustrates an aborted write operation followed by a read operation.
Setting the auto increment bit in the MAP allows successive reads or writes of consecutive registers. Each
byte is separated by an acknowledge bit.
START
Figure
0
1
CHIP ADDRESS (WRITE)
0
1
CHIP ADDRESS (WRITE)
1
0
1
0
Send start condition.
Send 100111x0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto increment off.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 100111x1(chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
0
2
19, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-
0
2
1
3
1
3
1
1 1 AD0 0
4
4
1
5
5
AD0
6
6
Figure 20. Control Port Timing, I²C Aborted Write + Read
7
7
0
ACK
ACK
8
8
INCR
9
INCR
9
Figure 19. Control Port Timing, I²C Write
10 11
10 11
6
6
MAP BYTE
5
5
MAP BYTE
12 13 14 15
12
4
4
13 14 15
3
3
2
2
1
1
16 17 18
0
16
0
ACK
ACK
STOP
17 18
START
7
19
6
19
DATA
1
20 21 22 23 24
CHIP ADDRESS (READ)
0
24 25
1
0
0
ACK
1
26
1
27 28
7
1 AD0 1
DATA +1
6
25
26 27 28
1
ACK
0
7
DATA
7
DATA +n
0
6
ACK
1
DATA +1
7
0
ACK
0
STOP
CS2300-CP
DATA + n
7
DS843F1
0
ACK
NO
STOP

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