CS42L52-DNZ Cirrus Logic Inc, CS42L52-DNZ Datasheet - Page 39
![IC,Soundcard Circuits,LLCC,40PIN,PLASTIC](/photos/6/80/68051/mfg_cs42l52_series_sml.jpg)
CS42L52-DNZ
Manufacturer Part Number
CS42L52-DNZ
Description
IC,Soundcard Circuits,LLCC,40PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Type
Stereo Audior
Datasheet
1.CS42L52-CNZ.pdf
(82 pages)
Specifications of CS42L52-DNZ
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
1 / 1
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
99 / 98
Voltage - Supply, Analog
1.65 V ~ 2.63 V
Voltage - Supply, Digital
1.65 V ~ 2.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1580 - REFERENCE DESIGN FOR CS42L52598-1508 - BOARD EVAL FOR 42LDB1 CODEC598-1505 - BOARD EVAL FOR CS42L52 CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS680F1
4.12.2 Memory Address Pointer (MAP)
4.12.2.1 Map Increment (INCR)
The device has MAP auto-increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is
set to 0, MAP will stay constant for successive I²C writes or reads. If INCR is set to 1, MAP will auto-in-
crement after each byte is read or written, allowing block reads or writes of successive registers.
Send start condition.
Send 10010100 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto-increment off.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 10010101 (chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
Setting the auto-increment bit in the MAP allows successive reads or writes of consecutive registers. Each
byte is separated by an acknowledge bit.
The MAP byte comes after the address byte and selects the register to be read or written. Refer to the
pseudo code above for implementation details.
5/13/08
CS42L52
39