CS5368-DQZR Cirrus Logic Inc, CS5368-DQZR Datasheet - Page 30

• Manufacturer Part Number: CS5368-DQZR
• Description: IC,A/D CONVERTER,OCTAL,24-BIT,QFP,48PIN
• Manufacturer: Cirrus Logic Inc

DS624A1
5. REGISTER MAP
In Control Port Mode, the bits in these registers are used to control all of the programmable features of the ADC.
5.1
5.2
5.3
Adr
00
01
02
03
04
05
06
07
08
09
0A
R/W
R/W
R/W
R
RESERVED
RESERVED
RESERVED
Register Quick Reference
OVFM
00h (REVI) Chip ID Code & Revision Register
01h (GCTL) Global Mode Control Register
Name
PDNE
MUTE
SDEN
GCTL
OVFL
REVI
Default: See description
The Chip ID Code & Revision Register is used to store the ID and revision of the chip.
Bits[7:4] contain the chip ID, where the CS5368 is represented with a value of 0x8.
Bits[3:0] contain the revision of the chip, where revision A is represented as 0x0, revision B is
represented as 0x1, etc.
Default:
The Global Mode Control Register is used to control the Master/Slave Speed modes, the serial
audio data format and the Master clock dividers for all channels. It also contains a control port
enable bit.
Bit[7] CP-EN manages the Control Port Mode. Until this bit is asserted, all pins behave as if in
Stand-Alone Mode. When this bit is asserted, all pins used in Stand-Alone Mode are ignored, and
the corresponding register values become functional.
HPF
CP-EN
7
7
OVFM8
MUTE8
OVFL8
CP-EN
0x00
HPF8
7
-
-
-
not used
CLKMODE
CLKMODE
6
6
CHIP-ID[3:0]
OVFM7
MUTE7
OVFL7
HPF7
6
CHIP-ID[3:0]
-
-
-
not used
5
5
PDN-BG PDN-OSC
OVFM6
MUTE6
OVFL6
HPF6
MDIV[1:0]
5
-
-
-
MDIV[1:0]
OVFM5
4
4
MUTE5
OVFL5
HPF5
4
-
-
-
OVFM4
MUTE4
SDEN4
OVFL4
PDN87
3
3
HPF4
3
-
-
-
DIF[1:0]
DIF[1:0]
OVFM3
MUTE3
SDEN3
PDN65
OVFL3
REVISION[3:0]
HPF3
2
2
REVISION[3:0]
2
-
-
-
OVFM2
MUTE2
SDEN2
PDN43
OVFL2
HPF2
1
1
MODE[1:0]
1
-
-
-
MODE[1:0]
CS5368
OVFM1
MUTE1
SDEN1
PDN21
OVFL1
HPF1
0
0
0
-
-
-
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